2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers 2015
DOI: 10.1109/isscc.2015.7062921
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3.1 A 28Gb/s multi-standard serial-link transceiver for backplane applications in 28nm CMOS

Abstract: Broadcom, Irvine, CA Rapid internet traffic growth has fueled the demand for bandwidth in metro networks and data centers and pushed the serial link data rate into 25Gb/s territory, populated by such electrical interface as OIF CEI-25G, CEI-28G [1], IEEE 802.3bj 100G-KR4. To cope with severe channel impairments at 25Gb/s with up to 30dB loss at Nyquist, a feed-forward equalizer (FFE)/decision feedback equalizer (DFE) based transceiver without power-hungry analog-todigital converter (ADC) provides robust perfor… Show more

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Cited by 12 publications
(3 citation statements)
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“…At present, the speed of a high-speed serial interface (SerDes) has developed to 112-224 Gb/s PAM4 [1][2][3][4][5][6], which requires 28-56 GHz analog bandwidth. The parasitic capacitance at input/output ports becomes intolerable for such high-speed signal.…”
Section: Introductionmentioning
confidence: 99%
“…At present, the speed of a high-speed serial interface (SerDes) has developed to 112-224 Gb/s PAM4 [1][2][3][4][5][6], which requires 28-56 GHz analog bandwidth. The parasitic capacitance at input/output ports becomes intolerable for such high-speed signal.…”
Section: Introductionmentioning
confidence: 99%
“…In addition, this type of driver has worse energy efficiency than a voltage-mode driver. Implementing the FFE in the voltagemode driver can alleviate these issues [9]- [12]. However, in the voltage-mode driver, the output driver segmentation used to implement the equalization limits the FFE resolution, causes routing congestion, and increases the pre-driver complexity [13].…”
Section: Introductionmentioning
confidence: 99%
“…However, in the voltage-mode driver, the output driver segmentation used to implement the equalization limits the FFE resolution, causes routing congestion, and increases the pre-driver complexity [13]. Therefore, it is difficult to apply these voltage-mode designs [9]- [12] to applications with various channel environments with a single design. That is, the design methodology or process node should be modified depending on the application.…”
Section: Introductionmentioning
confidence: 99%