28.7 A 0.00378mm² Scalable Neural Recording Front-End for Fully Immersible Neural Probes Based on a Two-Step Incremental Delta-Sigma Converter with Extended Counting and Hardware Reuse

A Low-Power Opamp-Less Second-Order Delta-Sigma Modulator for Bioelectrical Signals in 0.18 µm CMOS

“…The performance of the proposed readout is summarized in Table 1 and compared to the prior art, including readout circuits integrated into arrays for in vitro [ 3 , 9 , 11 , 12 ] platforms, in vivo implants [ 5 , 10 , 15 , 17 ], and standalone converters [ 13 , 16 ]. Our work features low noise characteristics (<6 μV rms ), low power consumption (<5 μW/ch), and a compact footprint (<0.01 mm 2 /ch), which is in line with the state of the art.…”

“…The overall performance of the converter presented in [ 13 ] appears superior; however, the converter reported here was implemented in 0.18-μm CMOS and provided synchronous output, which may be advantageous depending on the application. Finally, it is noteworthy that the converter reported in [ 17 ] achieves comparable metrics while it includes on-chip decimation filters.…”

“…Current state-of-the-art implementations of neural interfaces include a wide variety of analog-to-digital converter (ADC) topologies, such as successive approximation registers (SAR) [ 3 , 10 , 11 , 12 ], analog-to-time converters (ATC) [ 13 ], single-slope (SS) architectures [ 9 , 14 ], and different combinations of delta (∆) and delta-sigma (∆Σ) modulators [ 5 , 15 , 16 , 17 ]. ∆Σ modulators are well suited to low-frequency applications owing to noise-shaping, which reduces in-band quantization noise by means of high-pass filtering [ 18 ].…”

A Compact, Low-Power Analog Front-End With Event-Driven Input Biasing for High-Density Neural Recording in 22-nm FDSOI

“…By removing the feedback path or adding a coarse DAC for offset rejection (Fig. 1(d)), a significant area reduction is achieved in [11], [12]. With the help of a global reference control, those designs work well using a floating measurement setup.…”

A Compact Chopper Stabilized Δ-ΔΣ Neural Readout IC With Input Impedance Boosting

“…Several mixed-signal techniques have been proposed to address these challenges, and the field has recently seen significant improvements in channel input range [23]- [26] and power consumption [27], however, usually at the expense of area. In contrast, impressive area reductions have been achieved by applying direct conversion to the electrode interface [12], [28], but at the expense of either increased noise (10.46/20.19 µV rms ) or reduced input range (14 mV pp ). Although small area has also been achieved in several low-frequency readouts [21], [22], [29]- [31], those architectures cannot be easily extrapolated to the larger bandwidth and higher electrode impedance required for AP recording.…”