2-D–3-D Switchable Gate Driver Circuit for TFT-LCD Applications

Multioutputs single‐stage gate driver on array with wide temperature operable thin‐film‐transistor liquid‐crystal display for high resolution application

“…Hydrogenated amorphous silicon (a‐Si:H) is widely used in active‐matrix liquid‐crystal displays (LCDs) and peripheral driver circuits because it has high uniformity and low cost of the fabrication. Recently, the integration of gate drivers with the a‐Si:H TFTs on glass substrates provides many advantages, including improvement on compactness and reliability, reduction in the cost by eliminating external driver integrated circuits (ICs) and related bonding connections, and simplification of data driver configuration …”

“…Recently, the integration of gate drivers with the a-Si:H TFTs on glass substrates provides many advantages, including improvement on compactness and reliability, reduction in the cost by eliminating external driver integrated circuits (ICs) and related bonding connections, and simplification of data driver configuration. [1][2][3][4][5][6][7][8][9][10][11][12][13][14] However, the design of the gate driver using a-Si:H thin-film transistor (TFT) is confronted with some difficulties such like long-term stress degradation, low-effect field mobility, and the lack of a P-type transistor to build the complementary metal-oxide-semiconductor (CMOS) structure. For the high resolution display application, the thousands micrometer width of the main driving TFT is required to drive the gate line of the panel; the modification results in widening the bezel of panel.…”

7‐1: Invited Paper: Application of Low‐Frequency Clock Signals to Gate Driver Circuits

“…The critical issue of this circuit is that T3 and T4 are only activated once in a frame so that voltages at Q [N] and G [N] cannot be held at a low voltage stably when the gate line is not selected, which might cause a gate driver circuit to generate unexpected scan pulses, resulting in wrong array operation. Afterward, extra pull-down circuits to maintain Q [N] and G [N] at a low voltage were added to prevent fluctuation at G [N] [2]- [9]. To date, design of gate driver circuits is mature enough to sustain stable output waveforms to drive pixel arrays, and their development has been trending towards diverse add-on features including low-power consumption [2], flexibility of bidirectional scan function [8], adaptability for two-dimension (2-D) and three-dimension (3-D) display modes [9], and compatibility with the in-cell touch function [10].…”

“…Afterward, extra pull-down circuits to maintain Q [N] and G [N] at a low voltage were added to prevent fluctuation at G [N] [2]- [9]. To date, design of gate driver circuits is mature enough to sustain stable output waveforms to drive pixel arrays, and their development has been trending towards diverse add-on features including low-power consumption [2], flexibility of bidirectional scan function [8], adaptability for two-dimension (2-D) and three-dimension (3-D) display modes [9], and compatibility with the in-cell touch function [10]. Among these features, low power has received attention for a while.…”

Optimal design of a novel amorphous silicon gate driver circuit using a TFT-circuit-simulation-based multi-objective evolutionary algorithm

“…The gate driver circuit with an amorphous silicon thinfilm transistor (TFT) is currently one of the essential issues of TFT-LCD (liquid crystal display) panel manufacturing [1][2][3][4][5][6][7]. Due to the mature fabrication, low cost, and compactness of the hydrogenated amorphous TFT (a-Si:H TFT), it surpasses other technologies.…”