An architecture for a Cell Switch Fabric (CSF) with a new bus assignment strategy is
presented. The proposed architecture has a modular structure with a chip partitioning
oriented to avoid the system from falling down totally, thus achieving expandability and
increasing reusability. A discussion about different algorithms for the bus assignment
is given. The shared bus is assigned in a cyclic and rotative way, switching microcells
instead of cells. The CSF is built in four PCBs where every one has a capacity for four
ports at 164.323 Mbps, the external port rate is 155.52 Mbps. A microcontroller realizes
some tests and communicates with a PC, which runs a test, verification and CSF
configuration program. Some parameters about the CSF behavior are measured too.
Each Port was implemented on a CPLD FLEX10K100 and the Switch Control Block
on a circuit MAX7128, both from Altera Company.