2.5 Gbit/s ATM switch chip set

Plaza, P.; Merayo, L.A.; Díaz, José Luis Huertas; Conesa, José Luis

doi:10.1109/asic.1995.580708

Cited by 2 publications

(1 citation statement)

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“…An application of this switch fabric is a Data-Voice Switchsee Figure 1or an Ethernet Switch, which can be created if all line card interfaces are Ethernet type [1]. The CSF consists of a maximum of N---M-16, internal transfer rate V 164.323 Mbps a capacity C--NV Architectures [4,5] based on shared-memory [6,7] and common bus [8,9] and their variants [10] have been studied and shown in the literature. To select a specific architecture general design criteria were taken into account including:…”

Section: Cell Switch Fabric Architecturementioning

confidence: 99%

A New Bus Assignment Algorithm for a Shared Bus Switch Fabric

2000

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An architecture for a Cell Switch Fabric (CSF) with a new bus assignment strategy is presented. The proposed architecture has a modular structure with a chip partitioning oriented to avoid the system from falling down totally, thus achieving expandability and increasing reusability. A discussion about different algorithms for the bus assignment is given. The shared bus is assigned in a cyclic and rotative way, switching microcells instead of cells. The CSF is built in four PCBs where every one has a capacity for four ports at 164.323 Mbps, the external port rate is 155.52 Mbps. A microcontroller realizes some tests and communicates with a PC, which runs a test, verification and CSF configuration program. Some parameters about the CSF behavior are measured too. Each Port was implemented on a CPLD FLEX10K100 and the Switch Control Block on a circuit MAX7128, both from Altera Company.

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