This paper describes the design anld validation of a complex ASIC through the use of Verilog HDL. The CMC is an interface circuit for ATM cells, part of a 2.5 Gb/s switching fabric. Its main function is serial to pardlel and parallel to serial data conversion; another features like VPINCI translation, cell counting, insertion and extraction from an external microprocessor are also included. The validation and veriJication of the circuit implementation was carried out by simulating the different level of abstractions of the circuit descriptions thoroughly with Verilog-XL. Ar;r ECL cell Verilog library was written to be able to perform simulations of the complete circuit.The CMC is a 0.7 um BiCMOS IC, containing ECL and CMOS blocks. The complexity of the circuit is 320 Ktransistors on a die size of 224 nrm2. It has been encapsulated on a 319 pins CPGA package, dissipating 8.2 Watts at full speed.1 The ATM switch architecture and it:s high level validation.
ArchitectureATM is becoming the most accepted network technology for Broadband ISDN. Its bandwidth-ondemand feature offers two advantages: flexibility and statistical gain. While a worldwide consensus exists on the first point, statistical gain seems to be difficult to obtain. performance calculations have shown statistical gain is obtained when the link bit rate is much larger than the source bit rate [l].The current ATM technology handles 155 Mb/s link bit rates, and only sources with few Mb/s bit rates would take advantage of statistical gain effect. The solution for higher bit rate sources is to develop ATM links operating at 2.5 Gb/s or more.The ClMC circuit is part of a switching fabric able to process four 2.5 Gb/s ATM input links [2,3]. The switching function is performed using self routing spatial techniques [4,5]. The scalable switching fabric is built by interconnecting ICM circuits [6]. The CMC converts ATM cells into an internal data parallel format: rnicrocells (slices of the ATM cell plus extra information for switching addressing, error detection [
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