1st quantitative failure-rate calculation for the actual large-scale SRAM using ultra-thin gate-dielectric with measured probability of the gate-current fluctuation and simulated circuit failure-rate

Mechanism of state transition of a defect causing random-telegraph-noise-induced fluctuation in stress-induced leakage current of SiO2films

“…RTN causes dynamic fluctuation of MOSFET characteristics and change in device-characteristic values between discrete levels over time. Investigated examples of the effect of RTN include threshold-voltage fluctuation in flash-memory cells [2][3][4][5][6][7][8][9] and static random access memory (SRAM) cells, [10][11][12][13] junctionleakage-current fluctuation in dynamic random access memory (DRAM) cells, [14][15][16][17][18] dark random readout noise in CMOS image sensors, 19) and gate-leakage-current fluctuation of SRAM cells 20,21) and MOS capacitors. 22) State transition due to RTN is considered to be caused by an interaction between a defect and charge carriers.…”

“…RTN-induced fluctuation in gate-oxide leakage current, both in the case of a direct tunneling current through a thinner oxide (<4 nm) and a trap-assisted tunneling current through a thicker oxide (>4 nm), has been reported. [20][21][22] In the case of fluctuation of gate-leakage current of an SRAM cell, the gateoxide thickness of a 90-nm-node SRAM cell is less than 2 nm; therefore, leakage current through the gate oxide is due to direct tunneling, and it fluctuates at an amplitude greater than 1 nA. 20,21) In regard to trap-assisted tunneling current of a MOS capacitor with gate oxide thicker than 5 nm, fluctuation of stress-induced leakage current (SILC 23) ), called "variable SILC" (V-SILC), has been reported.…”

“…[20][21][22] In the case of fluctuation of gate-leakage current of an SRAM cell, the gateoxide thickness of a 90-nm-node SRAM cell is less than 2 nm; therefore, leakage current through the gate oxide is due to direct tunneling, and it fluctuates at an amplitude greater than 1 nA. 20,21) In regard to trap-assisted tunneling current of a MOS capacitor with gate oxide thicker than 5 nm, fluctuation of stress-induced leakage current (SILC 23) ), called "variable SILC" (V-SILC), has been reported. 22) V-SILC is considered to be a possible origin of erratic bits, such as moving bits, [24][25][26][27] fast bits, 28) and anomalous cells, 29,30) in advanced floating-gate-type flash memories.…”

Extraction of trap energy and location from random telegraph noise in gate leakage current (Ig RTN) of metal–oxide semiconductor field effect transistor (MOSFET)

“…Recently, study on the random telegraph noise in gate leakage current (I g RTN) has been drawing attention because gate current is more sensitive to oxide volume traps than drain current at ultra thin gate oxide or high-k gate dielectric [8][9][10][11][12][13]. I g RTN has been observed in the MOSFET devices biased in accumulation [11,12] as well as inversion.…”

Characteristics of Gate Current Random Telegraph Signal Noise in SiON/HfO2/TaN p-Type Metal–Oxide–Semiconductor Field-Effect Transistors under Negative Bias Temperature Instability Stress Condition

“…Probing and analyzing gate current random telegraph signal (I g RTS) noise has provided one sensitive tactic to investigate the physics-based properties of traps in SiO 2 or SiON gate stack devices. [1][2][3][4][5] Very recently, results of I g RTS in high-k/metal gate stack devices have been reported, 6) in which I g RTS of n-channel high-k devices was observed. However, the I g RTS on p-channel high-k devices has not been reported.…”