10-Gbps, 5.3-mW Optical Transmitter and Receiver Circuits in 40-nm CMOS

Liu, Frankie Y.; Patil, Dinesh; Lexau, Jon; Amberg, Philip; Dayringer, Michael; Gainsley, Jon; Moghadam, Hesam Fathi; Zheng, Xuezhe; Cunningham, J. E.; Krishnamoorthy, Ashok V.; Alon, Elad; Ho, Ron

doi:10.1109/jssc.2012.2197234

Cited by 94 publications

(40 citation statements)

References 50 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…There are two main paths towards an integrated platform. Hybrid/heterogeneous designs [1][2][3] enable each component to be custom-tailored, but suffer from large packaging parasitics, increased manufacturing costs due to requisite process flows, and costly 3D integration or microbump packaging. Monolithic integration mitigates integration overheads, but has not penetrated deeply-scaled technologies due to necessary process customizations [4].…”

mentioning

confidence: 99%

A 1.23pJ/b 2.5Gb/s monolithically integrated optical carrier-injection ring modulator and all-digital driver circuit in commercial 45nm SOI

Moss

Sun

Georgas

et al. 2013

2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers

View full text Add to dashboard Cite

Integrated photonic interconnect technology presents a disruptive alternative to electrical I/O for many VLSI applications. Superior bandwidth-density and energy-efficient operation can be realized through dense wavelength-division multiplexing (DWDM) and lower transmission losses. There are two main paths towards an integrated platform. Hybrid/heterogeneous designs [1][2][3] enable each component to be custom-tailored, but suffer from large packaging parasitics, increased manufacturing costs due to requisite process flows, and costly 3D integration or microbump packaging. Monolithic integration mitigates integration overheads, but has not penetrated deeply-scaled technologies due to necessary process customizations [4]. The first monolithic integration of photonic devices and electronic-photonic operation in sub-100 nm (45 nm SOI process with zero foundry changes) is demonstrated in [5]. This paper presents a monolithically integrated optical modulator with a new all-digital driver circuit in a commercial 45nm SOI process. The waveform-conditioning driver circuit enables the carrier-injection modulator to operate at 2.5Gb/s with an energy-cost of 1.23pJ/b, making it ~4× faster and more energy-efficient than the previous monolithically integrated driver/modulator presented in [5].The double-data-rate (DDR) modulator and driver circuit (Fig. 7.6.1) are fabricated as part of a 5M-transistor integrated platform for optical I/O. Light from an off-chip laser couples onto the die through vertical grating couplers and propagates through on-chip silicon waveguides. Fed by two 31b on-chip pseudo-random bit sequence (PRBS) generators, the DDR modulator circuit drives the modulator device to imprint data onto a particular wavelength-channel. A digital snapshot checks the validity of the generated data. The optically-modulated data is brought off-chip through a vertical grating coupler and measured using an optical oscilloscope.The optical modulator device is a resonant ring with rib waveguide carrier-injection phase shifters, identical to the one in [5], implemented using a combination of the gate polysilicon and body silicon layers in the process front-end. The device cross-section and transfer function are illustrated in Fig. 7.6.2. The optical 3dB bandwidth of the device is 45GHz. Modulation is achieved by tuning the ring in and out of the wavelength-channel through carrier injection. Due to long carrier lifetimes in single-crystalline Si, this device has an electrical 3dB bandwidth of approximately 250MHz that limits the data-rate in [5] to 600Mb/s at an energy cost of 4.2pJ/b. The driver we present in this work overcomes this bandwidth limitation through optimized drive conditioning with the same optical device design and 1950μm 2 area footprint.The DDR driver circuit (Fig. 7.6.3) is designed as an all-digital push-pull driver circuit with configurable drive strengths, sub-bit-time pre-emphasis [6] and split supplies, operating over a range of drive current profiles required for a wide variety of optical devices. The ...

show abstract

mentioning

confidence: 99%

A 1.23pJ/b 2.5Gb/s monolithically integrated optical carrier-injection ring modulator and all-digital driver circuit in commercial 45nm SOI

Moss

Sun

Georgas

et al. 2013

2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers

View full text Add to dashboard Cite

show abstract

“…Our measurements estimate the TOV capacitance to be ~3fF, which enables low-power and highsensitivity electronic-photonic systems for a variety of applications. This represents an order of magnitude reduction in parasitic capacitance, and two orders of magnitude higher density compared to previously demonstrated µ-bump flip-chip electronic-photonic integration [3]. The optical chip-to-chip link is a part of the wafer-scale heterogeneously integrated technology-development and demonstration platform with low-energy optical transmitters, receivers, and comprehensive backends for performance characterization (Fig.…”

Section: D Integration Of Cmos and Photonicsmentioning

confidence: 92%

Demonstration of an optical chip-to-chip link in a 3D integrated electronic-photonic platform

Settaluri

Lin

Moazeni

et al. 2015

ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC)

View full text Add to dashboard Cite

A full optical chip-to-chip link is demonstrated for the first time in a wafer-scale heterogeneous platform, where the photonics and CMOS chips are 3D integrated using wafer bonding and low-parasitic capacitance thru-oxide vias (TOVs). This development platform yields 1000s of functional photonic components as well as 16M transistors per chip module. The transmitter operates at 6Gb/s with an energy cost of 100fJ/bit and the receiver at 7Gb/s with a sensitivity of 26µA (-14.5dBm) and 340fJ/bit energy consumption. A full 5Gb/s chip-to-chip link, with the on-chip calibration and self-test, is demonstrated over a 100m single mode optical fiber with 560fJ/bit of electrical and 4.2pJ/bit of optical energy.

show abstract

“…In previous designs we have aimed for about 20 μA of input swing [6]. From the figure, we see that the 10 dB loss channel can satisfy this requirement for any laser between 1549.96 and 1550.05, a 90 pm spread-or equivalently, for any ring tuning over the same 90 pm range.…”

Section: Resonant Ringsmentioning

confidence: 94%

Design considerations for a 33mW, 12.5 Gbps × 8 channel silicon photonic transmitter array

Lexau

Zheng

Chang

et al. 2013

2013 IEEE Asian Solid-State Circuits Conference (A-Sscc)

Self Cite

View full text Add to dashboard Cite

We report on a hybrid assembly combining 40 nm bulk CMOS transmitter circuits, 130 nm SOI optical ring modulators, and off-chip lasers. Silicon resistors in the rings enable circuit-based thermal tuning to overcome process variations, resulting in eight 12.6 Gbps channels operating simultaneously at eight different wavelengths. Not counting laser power but including all transmitter circuits, integration parasitics, and static thermal control, the TX array consumes a total of 33 mW, resulting in a net per-channel efficiency of 330 fJ/b.

show abstract

10-Gbps, 5.3-mW Optical Transmitter and Receiver Circuits in 40-nm CMOS

Cited by 94 publications

References 50 publications

A 1.23pJ/b 2.5Gb/s monolithically integrated optical carrier-injection ring modulator and all-digital driver circuit in commercial 45nm SOI

A 1.23pJ/b 2.5Gb/s monolithically integrated optical carrier-injection ring modulator and all-digital driver circuit in commercial 45nm SOI

Demonstration of an optical chip-to-chip link in a 3D integrated electronic-photonic platform

Design considerations for a 33mW, 12.5 Gbps × 8 channel silicon photonic transmitter array

Contact Info

Product

Resources

About

10-Gbps, 5.3-mW Optical Transmitter and Receiver Circuits in 40-nm CMOS

Cited by 94 publications

References 50 publications

A 1.23pJ/b 2.5Gb/s monolithically integrated optical carrier-injection ring modulator and all-digital driver circuit in commercial 45nm SOI

A 1.23pJ/b 2.5Gb/s monolithically integrated optical carrier-injection ring modulator and all-digital driver circuit in commercial 45nm SOI

Demonstration of an optical chip-to-chip link in a 3D integrated electronic-photonic platform

Design considerations for a 33mW, 12.5 Gbps &#x00D7; 8 channel silicon photonic transmitter array

Contact Info

Product

Resources

About

Design considerations for a 33mW, 12.5 Gbps × 8 channel silicon photonic transmitter array