±0.18‐V supply voltage gate‐driven PGA with 0.7‐Hz to 2‐kHz constant bandwidth and 0.15‐μW power dissipation

Abstract

A simple gate-driven scheme to reduce the minimum supply voltage of AC coupled amplifiers by close to a factor of two is introduced. The inclusion of a floating battery in the feedback loop allows both input terminals of the op-amp to operate very close to a supply rail. This reduces essentially supply requirements. The scheme is verified experimentally with the example of a PGA that operates with ±0.18-V supply voltages in 0.18-μm CMOS technology and a power dissipation of about 0.15 μW. It has a 4-bit digitally programmable gain and 0.7-Hz to 2-kHz true constant bandwidth that is independent on gain with a 25-pF load capacitor. In addition, simulations of the same circuit in 0.13-μm CMOS technology show that the proposed scheme allows operation with ±0.08-V supplies, 7.5-Hz to 8-kHz true constant bandwidth with a 25-pF load capacitor, and a total power dissipation of 0.07 μW. KEYWORDS floating battery, low voltage amplifier, nanowatt power consumption, programmable gain amplifier, true constant bandwidth | INTRODUCTIONA crucial aspect to reduce the power dissipation of analog and digital integrated systems is the reduction of their minimum supply requirements. For analog circuits based on op-amps, this can be achieved by keeping both amplifier input terminals close to a supply rail. Several papers have reported systems operating from supplies as low as 0.5 V (some without experimental verification). Most of them are bulk-driven (BD) circuits based on injecting input signals through the bulk terminal while connecting the gate to a supply rail 1-7 . The main disadvantage of the BD technique is that bulk transconductance is usually a factor 4-5 lower than the gate transconductance. This leads to essential gain bandwidth degradation, higher input noise, higher offset, etc. Also, input leakage currents (required to be supplied by the signal sources) can become comparable to the bias currents even for moderate input signal swings that weakly turn on the bulk PN junction. Additionally bulk driven circuits suffer from large bulk parasitic capacitances that results in large input capacitance. Other non-body driven (gate-driven (GD)) low voltage approaches use relatively large valued DC current sources to maintain both inputs of the op-amp close to a supply rail. The DC current sources are implemented with relatively low valued resistors. They increase essentially quiescent power dissipation and can also lead to a large output offset voltage and bandwidth degradation 7 . In this paper, we introduce a very simple technique to implement GD AC coupled amplifiers that can operate with ±0.18-V dual supply voltages V supply in 0.18-μm CMOS technology and ±0.08 V in 0.13-μm CMOS technology.

Class AB amplifier with enhanced slew rate and GBW

“…First, the input current is sensed at the source of M CN1 ‐M CN2 , in order to benefit from the reduced input resistance at this node due to the FVF feedback loop. Second, the quasi‐floating gate (QFG) technique is applied to achieve class AB operation. It is based on including two capacitors C bat and two high‐resistance pseudo‐resistors M PR .…”

CMOS Analog AGC for Biomedical Applications

“…Subsequently, the filter (Reject Band) rejects the power line noise (50 Hz-60 Hz) [5]. The next stage is a variable gain amplifier (VGA) [6], which changes its gain in order to maintain the output signal within optimal values for an analog-to-digital converter (ADC). This paper proposes the use of an Analog Automatic Gain Control (AGC) to handle amplitude changes in biomedical signals to adequate the signal into the input range of the ADC.…”