Power hardware-in-the-loop (PHIL) is a state-ofthe-art simulation technique that combines real-time digital simulation and hardware experiments into a closed-loop testing environment. The transportation delay or communication latency impacts the stability and accuracy of PHIL simulations. In this paper, for the purpose of synchronizing the PHIL output signal and promoting both the stability and accuracy of PHIL simulation, a hybrid compensation scheme is proposed to compensate for the time delay in the PHIL configuration. A model-based compensator is implemented to shift the time delay out of the PHIL closed-loop to enhance PHIL stability. A time delay compensation model and its equivalent inverse model are employed in the PHIL closed-loop to compensate for the time delay. A phase lead compensator and digital linear-phase frequency sampling filter (FSF) are candidate compensation models to compensate for the time delay and reshape the phase curve on a harmonic-by-harmonic basis. Simulations are made to validate the effectiveness of the compensation scheme.Index Terms-Power hardware-in-the-loop (PHIL), time delay compensation, model-based compensator, stability and accuracy.
Power hardware-in-the-loop (PHIL) simulation leverages the real-time emulation of a large-scale complex power system, while also enabling the in-depth investigation of novel actual power components and their interactions with the emulated power grid. The dynamics and non-ideal characteristics (e.g., time delay, non-unity gain, and limited bandwidth) of the power interface result in stability and accuracy issues within the PHIL closed-loop simulations. In this paper, a compensation method is proposed to compensate for the non-ideal power interface by maximizing its bandwidth, maintaining its unitygain characteristic, and compensating for its phase-shift over the frequencies of interest. The accuracy of power signals synchronization and the transparency of power transfer within the PHIL configuration are assessed by employing the error metrics. In conjunction with the frequency-domain stability analysis and the time-domain simulations, a case study is made to validate the proposed compensation method.
Power systems worldwide are experiencing rapid evolvements with a massive increase of renewable generation in order to meet the ambitious decarbonization targets. A significant amount of renewable generation is from Distributed Energy Resources (DERs), upon which the system operators often have limited visibility. This can bring significant challenges as the increasing DERs’ can lead to network constraints being violated, presenting critical risks for network security. Enhancing the visibility of DERs can be achieved via the provision of communication links, but this can be costly, particularly for real time applications. Digital Twin (DT) is an emerging technology that is considered as a promising solution for enhancing the visibility of a physical system, where only a limited set of data is required to be transmitted with the rest data of interest can be estimated via the DT. The development and demonstration of DTs requires realistic testing and validation enviorment in order to accelerate its adoption in the industry. This paper presents a real time simulation and hardware-in-the-loop (HiL) testing platform, specifically designed for prototyping, demonstrating and testing DTs of DERs. Within the proposed platform, a software-based communication emulator is developed, which allows the investigation of the impact of communication latency and jitter on the performance of DTs of the DERs. Case studies are presented to demonstrate the application of the developed DT prototyping process and testing platform to enable frequency control using the DTs, which provide valuable learnings and tools for enabling future DTs-based solutions.
Power hardware-in-the-loop (PHIL) simulation leverages the advanced real-time emulation based technique to carry out in-depth investigations on novel real-world power components. Power amplifiers, sensors, and signal conversion units based power interfaces (PI) incorporate physical hardware systems and real-time simulation platforms into PHIL setups. However, the employment of any interfacing technique inevitably introduces disturbances such as sensor noise, switching harmonics, or quantization noise to PHIL systems. To facilitate quantitatively analyzing and assessing the impact of external disturbances on PHIL simulation systems, a framework for sensitivity analysis of PHIL setups has been developed in this paper. Detailed modelling principles related to the sensitivity analysis of PHIL systems and the inherent relationship between sensitivity transfer functions and stability criteria are elaborated along with theoretical and experimental validation. Based on this concept, accuracy assessment methods are employed in this framework to quantify generic sensitivity criteria. Moreover, physical passive load and converterbased PHIL setups are applied and experimental results are presented to characterize and demonstrate the applicability of the proposed framework.INDEX TERMS Power hardware-in-the-loop (PHIL) simulation systems, sensitivity analysis, power interface, system modelling, system theory, control systems, real-time simulation system.
Grid-forming converter establishes a stable and controllable voltage at its output terminal without requiring external angle reference, which enables the GFC to be a candidate for providing black-start services. However, this attribute poses significant challenges to the conventional power hardware-in-theloop (PHIL) simulation, which incorporates the physical power converter by regulating its voltage angle to be synchronized with that of an interfacing power amplifier mimicking the real-time emulated power grid. The lack of voltage synchronization at the coupling point of GFC and interfacing power amplifier leads to instability. To address this challenge, the current-type interfacing method with compensation and scaling scheme is proposed to interface a GFC with soft black-start capability into a PHIL setup. Analytical assessment and experimental results involving interfacing a 90 kVA power converter implemented with gridforming control are presented to verify the methodology.Index Terms-Power hardware-in-the-loop (PHIL), gridforming converter, soft black-start, current-type power interface.
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