This study investigates the I-V behaviors of various E-mode GaN-based transistors under gate floating and zero gate bias. The p-GaN gate HEMTs, Gate injection transistors (GIT), and Cascode GaN FETs have been adopted and compared. The high off-state drain current is observed under gate floating except for Cascode GaN FETs based on the measured I-V characteristics. The off-state drain current of p-GaN gate HEMT is up to 0.8 mA under gate floating at a drain bias of 6 V, which is about 107 times larger than zero gate bias. The devices will induce false-turn-on and reverse conduction loss during switching under gate floating due to the capacitance charging effect between the drain and the gate electrodes. The mechanism of the capacitance charging effect is discussed using the equivalent circuit of p-GaN gate HEMTs and confirmed by Silvaco TCAD simulation.
This study proposes three hybrid Schottky-ohmic gate structures for normally-off p-GaN gate AlGaN/GaN HEMTs. One has a Schottky-gate cover on the ohmic-gate and has part of the area contact to the p-GaN surface at the left and right sides of ohmic-gate (Structure A). The two others only have the Schottky-gate contact to the p-GaN surface at the left side (Structure B) or right side (Structure C) of the ohmic-gate. Different gate metal designs change the hole injection from p-GaN to GaN channel and show various gate leakages. The optimized contact length of Schottky-gate can suppress on-state gate leakage current over two orders of magnitude compared to conventional ohmic p-GaN gate HEMT. The improved on-state maximum drain current is over 60 mA/mm compared to Schottky p-GaN gate HEMT. Optimal performance in Structure B with Schottky-gate contact length ranges from 0.8 to 1.8 μm in a 2 μm gate geometry.
This study investigates the gate degradation mechanisms of Schottky p-GaN gate high electron mobility transistors (HEMTs) systemically. The constant gate bias stress is applied to investigate the gate breakdown. Schottky p-GaN Gate HEMTs show a shorter gate lifetime as gate bias increases. The gate leakage current after gate breakdown shows a resistance-like characteristic. The equivalent circuit has been proposed to discuss the gate breakdown mechanisms. When applying a high gate bias for a long time, the high electric field will damage the p-GaN gate and passivation interface and generate the percolation path. The primary gate breakdown happens between the gate and source and results in a resistance-like I-V characteristic.
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