For the large equipment, system model is usually difficult to obtain, or changes slowly with the running time. Therefore, some methods based on accurate model are difficult to apply, such as wind turbine. Therefore, the data‐based robust value iteration method based on data is studied for variable pitch control of wind turbine for the first time, which can deal with uncertainty and do not require an accurate model. First, a new data‐driven Bellman equation is derived base on the system operation data. Next, the robust VI structure based on data is designed, which is a model free iteration algorithm. Then, a data‐driven value iteration pitch controller is proposed, the simulation results show the effectiveness of the control method.
With the advance of the combinatorial chemistry, a large number of synthetic compounds have surged. However, we have limited knowledge about them. On the other hand, the speed of designing new drugs is very slow. One of the key causes is the unacceptable toxicities of chemicals. If one can correctly identify the toxicity of chemicals, the unsuitable chemicals can be discarded in early stage, thereby accelerating the study of new drugs and reducing the R&D costs. In this study, a new prediction method was built for identification of chemical toxicities, which was based on ontology information of chemicals. By comparing to a previous method, our method is quite effective. We hope that the proposed method may give new insights to study chemical toxicity and other attributes of chemicals.
With the development of VLSI technology, the fast algorithms and their hardware implementation for trigonometric calculations are more and more worthy. The CORDIC (Coordinate Rotational Digital Computer) can break the basis functions down to operations of shift and addition or subtraction, which can be used to lay the foundation for the realization of complex logic operations. In this paper, an optimized CORDIC algorithm and its FPGA (Field Programmable Gate Array) implementation are proposed. The proposed algorithms are modeled in Verilog Hardware Description Language and implemented with FPGA. The simulation results show that the functions of sine and cosine are realized successfully, and the proposed algorithm not only improves the computation speed but also reduces the system hardware resources. [1]
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