An ultra-low specific on-resistance 4H-SiC power laterally diffused metal oxide semiconductor (LDMOS) device is proposed for 1200V-class applications. In the proposed SiC LDMOS device, a double-trench gate is introduced to reduce the channel region resistance. And a p-type variation lateral doping (VLD) region is also employed in the drift region, which not only optimizes the surface electric field and improves the breakdown voltage, but also increases the doping concentration of the N-drift region, resulting in a low drift region resistance. So that, the proposed device achieves an ultra-low specific on-resistance (Ron,sp). Numerical Simulation results show that the Ron,sp of the proposed SiC LDMOS is 3.5 mΩcm 2 with a breakdown voltage of ~1460V, which is reduced by more than 46% compared with the conventional field-plate SiC LDMOS with a Ron,sp of 6.6 mΩcm 2 and a breakdown voltage of ~ 1210V. The transconductance of the proposed device is improved greatly. And the trade-off relationship between the Ron,sp and the breakdown voltage is also significantly improved compared with those of the conventional device and the previous literature.
A new SiC superjunction power MOSFET device using high-k insulator and p-type pillar with an integrated Schottky barrier diode (Hk-SJ-SBD MOSFET) is proposed, and has been compared with the SiC high-k MOSFET (Hk MOSFET), SiC superjuction MOSFET (SJ MOSFET) and the conventional SiC MOSFET in this article. In the proposed SiC Hk-SJ-SBD MOSFET, under the combined action of the p-type region and the Hk dielectric layer in the drift region, the concentration of the N-drift region and the current spreading layer can be increased to achieve an ultra-low specific on-resistance (R on,sp). The integrated Schottky barrier diode (SBD) also greatly improves the reverse recovery performance of the device. TCAD simulation results indicate that the R on,sp of the proposed SiC Hk-SJ-SBD MOSFET is 0.67 mΩ·cm2 with a 2240 V breakdown voltage (BV), which is more than 72.4%, 23%, 5.6% lower than that of the conventional SiC MOSFET, Hk SiC MOSFET and SJ SiC MOSFET with the 1950, 2220, and 2220 V BV, respectively. The reverse recovery time and reverse recovery charge of the proposed MOSFET is 16 ns and18 nC, which are greatly reduced by more than 74% and 94% in comparison with those of all the conventional SiC MOSFET, Hk SiC MOSFET and SJ SiC MOSFET, due to the integrated SBD in the proposed MOSFET. And the trade-off relationship between the R on,sp and the BV is also significantly improved compared with that of the conventional MOSFET, Hk MOSFET and SJ MOSFET as well as the MOSFETs in other previous literature, respectively. In addition, compared with conventional SJ SiC MOSFET, the proposed SiC MOSFET has better immunity to charge imbalance, which may bring great application prospects.
A new high-performance sidewall enhanced trench junction barrier Schottky (SET-JBS) diode is proposed in this article. In the proposed SET-JBS diode, in addition to the Schottky contact on the top anode, the sidewall of the trenches also introduces Schottky contacts, which not only increases the Schottky contact area, but also weakens the JFET (Junction Field-Effect Transistor) effect of the device, resulting in a high forward current density and a low specific on-resistance (R on,sp) with a small increase in reverse leakage current (J L). Simulation results show that the R on,sp of the proposed SET-JBS diode is reduced by 21.6% to 46.7% with less than an order of magnitude increase in leakage current compared with that of the conventional trench JBS (T-JBS) diode when the trench distance is from 2.1μm to 1.2 μm at the 2μm trench depth. And the SET-JBS diode also performs better than the trench MOS barrier Schottky (TMBS) diode when comprehensively considered the R on,sp and J L. And the figure of merit (FOM) and the trade-off relationship between the R on,sp and the breakdown voltage of the proposed SET-JBS both are better than those of the conventional T-JBS diode and TMBS diode. The forward I-V analytical model of the SET-JBS is also proposed, which is in good agreement with the simulation results. All the simulation results indicate that the proposed SET-JBS diode has promising potential in power electronics applications.
Gallium oxide (Ga2O3) has drawn remarkable attention for next generation power electronics applications. However, the development of Ga2O3 power devices is seriously restricted due to its inefficient p-type dopants and low thermal conductivity. Here, a novel Ga2O3 superjunction (SJ) LDMOS (laterally-diffused metal-oxide semiconductor) device with introduction of a p-type diamond layer in the drift region is proposed and numerical investigated. The drift region of the proposed Ga2O3 device consists of n-type Ga2O3, Al2O3 and p-type diamond, which is not only increases the breakdown voltage (BV) and reduces the specific on-resistance (Ron,sp), but also improves thermal performance of the device. The simulation results show that the BV and Ron,sp of the proposed device are 23.22 mΩcm2 and 7000 V, which are improved by more than 82.3% and 100% compared with those the conventional gate-connected filed-plate Ga2O3 LDMOS with a Ron,sp of 131.43mΩcm2 and a BV of 3000 V, respectively. Moreover, the thermal performance of the proposed Ga2O3 SJ LDMOS is also improved dramatically, although the power density of the proposed device is about 5.7 times higher than that of the conventional device.
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