A c c e p t e d M a n u s c r i p t 1 A novel ±0.8V high performance voltage-tunable CDTA with enhanced bandwidthIn this paper, we proposed a novel high performance CMOS CDTA with the G M can be linearly tuned by a voltage. By using high-speed low voltage cascaded current mirror active resistance compensation technique, the proposed CDTA circuit exhibits wide frequency bandwidths, high current tracking precisions as well as large output impedances. The linear-tunable G M of CDTA is designed with use of linear composite MOSFETs as basic cells in the circuit. Combining these two approaches, several design concerns are studied: impedance characteristic, tracking errors, offset and linearity, as well as noise. The prototype chip with a 0.25 mm 2 area is fabricated in GlobalFoundries'0.18μm CMOS process. The simulated results and measured results with ±0.8V DC supply voltages are presented, which show extremely wide bandwidths and wide linear tuning range. In addition, a fully differential band-pass filter for high-speed system is also given as an example to confirm the high performance of proposed circuit.

No abstract

A novel sub-harmonic upconversion mixer using Chartered 0.18 μm radio-frequency (RF) CMOS technology for 2.4 GHz wireless application is introduced. Using the sub-harmonic technique, the required local oscillator (LO) frequency can be reduced a half, which simplifies the design of the LO. Moreover, the sub-harmonic technique can effectively reduce the influence of LO leakage. The measured results demonstrate that the novel upconversion mixer can provide about 14.4 dB conversion gain, whereas the power consumption is only 1.65 mW with a 1 V supply voltage, and the input-referred thirdorder intercept point (IIP3) of the mixer is about 4 dBm. The chip area including test pads is only 0.7 × 0.72 mm 2 .

No abstract

This paper presents a new topology for realizing current-mode reconfigurable nth-order filter for multi-mode wireless communication equipments, which is based on a new active device, namely digitally programmable current differencing transconductance amplifier (DPCDTA). The proposed filter is resistorless, and it employs n DPCDTAs and n grounded capacitors with one input and one output terminals. The signal path of the filter does not contain any switches, and wide tuning coefficient of the filter is implemented using programmable current division network with zero standby power consumption in the DPCDTA. Also, the proposed topology exhibits broader programmable features to accommodate wide range of selectivity requirements, which can be used as the most compatible structure for fieldprogrammable analog array and very suitable for multi-mode filtering applications. The programming ability of variable filter orders from first to fourth providing low-pass, highpass, and band-pass responses, and programming ability of variable cutoff frequencies from 1.14 to 11.75 MHz are given as application examples. The performance of the circuits have been verified and evaluated through post-layout simulations using Cadence IC5141 with GlobalFoundries'0.18 μm CMOS process.