We have demonstrated a polymeric electro-optic modulator based on a 1ϫ2 Y-fed directional waveguide coupler. The symmetric geometry of the 1ϫ2 Y-fed directional coupler provided the modulator unique characteristics of intrinsic 3 dB operating point and two complementary output ends. A low switching voltage of 3.6 V and a high extinction ratio of 26 dB were obtained with the modulator operating at a wavelength of 1.34 m. The modulator was fabricated with a novel electro-optic polymer that was synthesized from polyurethane cross-linking with a chromophore.
Communication between computing systems is recognized as the main limitation to increasing the speed of all-electronic systems beyond levels currently achieved in existing supercomputers. Optical interconnects hold great promise in eliminating current communication bottlenecks because of properties that stem from optics inherent parallelism. Wavelength-division multiplexing (WDM) technology, by which multiple optical channels can be simultaneously transmitted at different wavelengths through a single optical transmission medium is a useful means of making full use of optics parallelism over a wide-wavelength region. In this talk, we review the working principles of wavelength division (de)multiplexers (WD(D)M) for optoelectronic interconnection in high-throughput optical links and address the optical design issues of WD(D)Ms. Several grating-based WD(D)M structures are analyzed. We report experimental data for several versions of WD(D)Ms which exhibit low insertion loss, high reliability, and low cost.Key words: WDM, optoelectronic interconnect, optical interconnect, fiber optics, optical link, high throughput link 1.INTRODUCTIONThere is a broad consensus that major discoveries in key sciences would be within reach if computers were far more powerful that today's conventional supercomputers. Only massively parallel processors are eligible to provide teraflops of computing power in solving problems containing trillions of data points and accessing terabytes of data. Such teraflop performance, derived from the product of the number of processing nodes and the processing power of each node, can be achieved both through the use of large numbers of nodes and from fundamental improvements in hardware technologies and the communication among algorithms. In enhancement of the processing power of the node and the density of nodes in ULSI and massively parallel processing, the communication congestion may arise in electric interconnection for exchange information inter-and intra-nodes. The problems met by electric interconnection in ULSI and massively parallel processor have the following a few aspects: A. The limitation of RC time constantIn order to enhance the density of devices integrated on a ULSI chip, all the dimensions, as well the voltage and currents on the chip are supposed to be scaled down by a factor α. It is obvious that the number of devices that can be placed on a chip of given size scale up by squared α. In addition, the power dissipation per device and the switching delay are decreased by a factor α. However, the RC time constant and the interconnect delay between the devices remain unchanged due to increase of the interconnect resistance and decrease of the distribution capacitance by the same factor α. So, it is clear that since gate delays decrease with scaling while interconnect delays remain constant with scaling, eventually the speed at which a circuit can operate is dominated by interconnect delays rather than device delays. B. The problem of clock skewMost computing architectures require...
It has been realized that the lack of enabling technology of beam forming and steering devices significantly slows down the process of implementing wideband phased array antenna systems. In this paper, we present our research in developing an integrated electro-optic switched true-time-delay module as a broadband beam forming device for wideband phased array antennas. The unique feature of our approach is that both the true-time-delay waveguide circuit and electro-optic switching elements are monolithically integrated in a single substrate. As a result, this integration significantly reduces the device size while eliminating the most difficult packaging problem associated with the delicate interfaces between optical fibers and optical switches. Such a monolithic approach offers greater precision for the RF phase control than the fiber-delay-lines thanks to the sub-micrometer accuracy of lithography-defined polymeric waveguides. More important, the proposed optical switched true-time-delay network requires very low electrical power consumption due to the low power consumption of electrically-switchable waveguide gratings. Furthermore, the electrically-switchable waveguide gratings have a very fast switching speed (<50 ts) that is at least 100 time faster than any existing commercial optical switching matrix. Photonic phased array antenna based on optical true-time delay lines offers improved performance and reduced weight and power consumption over existing parabolic dish antenna presently used for communications.
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