A transient three‐dimensional computational fluid dynamics model was developed to investigate the cooling performance of a partially loaded cold store in cooling process. The model accounted for turbulence by means of the standard k‐ε model with standard wall profiles. The model was validated successfully in cooling experiments with a mean error of 0.36 m/s and 1.4C for the air velocity in a refrigerated room and the temperature of the product, respectively. Based on the model, we studied the effect of different loading patterns of corrugated fiberboard containers filled with products in a cold store on cooling effectiveness. As a result, flat loading with air gaps was the optimal configuration to achieve high uniformity of temperature and rapid cooling. The findings of this study can help to elucidate and improve the cooling performance of refrigerated rooms for storing agricultural products. PRACTICAL APPLICATIONS The developed model is used to assess the cooling performance of partially loaded store. In this study, we have investigated how to stack the product in cold store to achieve uniform and rapid cooling. In order to extend the shelf life of fresh produce, it is very important to investigate the effect of loaded pattern on the cooling performance. The developed cooling model with 48 loaded corrugated fiberboard containers was based on one container cooling model. The approach presented in this paper can be used to design the loading pattern of agricultural products in a cold store.
A Single chip error correcting LSI of Reed-Solomon long minimum distance code (d=<17) has been developed for optical disk memory. High speed decoding of error correcting code has been realized by internal multi-processing architecture, in which interleaving, syndrome calculation, error correction, and data inter facing with the host computer are processed simultaneously. In addition to the adoption of a multiprocessor configuration, high speed hardware for error correction and detection is employed to realize “on the fly” decoding which decodes any decodable errors of a code of length n=20 distance d=<17 within 600 clocks. Euclidian algorithm is applied for correction of errors, and unknown error locations, besides, a newly developed recursive algorithm is applied to erasure correction if error locations are identified beforehand. This contributes to both high speed decoding and hardware reduction. Check words and other parameters are selectable and these are set up in registers via an external micro-controller bus. A Small Computer System Interface(SCSI-2) has been provided as the system interface.
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