Photonic bandgap crystals can reflect light for any direction of propagation in specific wavelength ranges. This property, which can be used to confine, manipulate and guide photons, should allow the creation of all-optical integrated circuits. To achieve this goal, conventional semiconductor nanofabrication techniques have been adapted to make photonic crystals. A potentially simpler and cheaper approach for creating three-dimensional periodic structures is the natural assembly of colloidal microspheres. However, this approach yields irregular, polycrystalline photonic crystals that are difficult to incorporate into a device. More importantly, it leads to many structural defects that can destroy the photonic bandgap. Here we show that by assembling a thin layer of colloidal spheres on a silicon substrate, we can obtain planar, single-crystalline silicon photonic crystals that have defect densities sufficiently low that the bandgap survives. As expected from theory, we observe unity reflectance in two crystalline directions of our photonic crystals around a wavelength of 1.3 micrometres. We also show that additional fabrication steps, intentional doping and patterning, can be performed, so demonstrating the potential for specific device applications.

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It is known that light can be slowed down in dispersive materials near resonances. Dramatic reduction of the light group velocity-and even bringing light pulses to a complete halt-has been demonstrated recently in various atomic and solid state systems, where the material absorption is cancelled via quantum optical coherent effects. Exploitation of slow light phenomena has potential for applications ranging from all-optical storage to all-optical switching. Existing schemes, however, are restricted to the narrow frequency range of the material resonance, which limits the operation frequency, maximum data rate and storage capacity. Moreover, the implementation of external lasers, low pressures and/or low temperatures prevents miniaturization and hinders practical applications. Here we experimentally demonstrate an over 300-fold reduction of the group velocity on a silicon chip via an ultra-compact photonic integrated circuit using low-loss silicon photonic crystal waveguides that can support an optical mode with a submicrometre cross-section. In addition, we show fast (approximately 100 ns) and efficient (2 mW electric power) active control of the group velocity by localized heating of the photonic crystal waveguide with an integrated micro-heater.

In recent years, deep neural networks (DNN) have demonstrated significant business impact in large scale analysis and classification tasks such as speech recognition, visual object detection, pattern extraction, etc. Training of large DNNs, however, is universally considered as time consuming and computationally intensive task that demands datacenter-scale computational resources recruited for many days. Here we propose a concept of resistive processing unit (RPU) devices that can potentially accelerate DNN training by orders of magnitude while using much less power. The proposed RPU device can store and update the weight values locally thus minimizing data movement during training and allowing to fully exploit the locality and the parallelism of the training algorithm. We evaluate the effect of various RPU device features/non-idealities and system parameters on performance in order to derive the device and system level specifications for implementation of an accelerator chip for DNN training in a realistic CMOS-compatible technology. For large DNNs with about 1 billion weights this massively parallel RPU architecture can achieve acceleration factors of 30, 000 × compared to state-of-the-art microprocessors while providing power efficiency of 84, 000 GigaOps∕s∕W. Problems that currently require days of training on a datacenter-size cluster with thousands of machines can be addressed within hours on a single RPU accelerator. A system consisting of a cluster of RPU accelerators will be able to tackle Big Data problems with trillions of parameters that is impossible to address today like, for example, natural speech recognition and translation between all world languages, real-time analytics on large streams of business and scientific data, integration, and analysis of multimodal sensory data flows from a massive number of IoT (Internet of Things) sensors.

We report the fabrication and accurate measurement of propagation and bending losses in single-mode silicon waveguides with submicron dimensions fabricated on silicon-on-insulator wafers. Owing to the small sidewall surface roughness achieved by processing on a standard 200mm CMOS fabrication line, minimal propagation losses of 3.6+/-0.1dB/cm for the TE polarization were measured at the telecommunications wavelength of 1.5microm. Losses per 90 masculine bend are measured to be 0.086+/-0.005dB for a bending radius of 1microm and as low as 0.013+/-0.005dB for a bend radius of 2microm. These record low numbers can be used as a benchmark for further development of silicon microphotonic components and circuits.

We report the design and testing of an SOI-based photonic integrated circuit containing two-dimensional membrane-type photonic crystal waveguides. The circuit comprises spot-size converters to efficiently couple light from a fiber into single-mode strip waveguides and butt-couplers to couple from strip waveguides to photonic crystal waveguides. Each optical interface was optimized to minimize back-reflections and reduce the Fabry-Perot noise. The transmission characteristics of each component are measured and record low propagation losses in photonic crystal waveguides of 24dB/cm are reported. The combination of an efficient two-stage coupling scheme and utilization of ultra-long (up to 2mm) photonic crystal waveguides reduces the uncertainty in determining the loss figure to 3dB/cm.

Integration of optical communication circuits directly into high-performance microprocessor chips can enable extremely powerful computer systems. A germanium photodetector that can be monolithically integrated with silicon transistor technology is viewed as a key element in connecting chip components with infrared optical signals. Such a device should have the capability to detect very-low-power optical signals at very high speed. Although germanium avalanche photodetectors (APD) using charge amplification close to avalanche breakdown can achieve high gain and thus detect low-power optical signals, they are universally considered to suffer from an intolerably high amplification noise characteristic of germanium. High gain with low excess noise has been demonstrated using a germanium layer only for detection of light signals, with amplification taking place in a separate silicon layer. However, the relatively thick semiconductor layers that are required in such structures limit APD speeds to about 10 GHz, and require excessively high bias voltages of around 25 V (ref. 12). Here we show how nanophotonic and nanoelectronic engineering aimed at shaping optical and electrical fields on the nanometre scale within a germanium amplification layer can overcome the otherwise intrinsically poor noise characteristics, achieving a dramatic reduction of amplification noise by over 70 per cent. By generating strongly non-uniform electric fields, the region of impact ionization in germanium is reduced to just 30 nm, allowing the device to benefit from the noise reduction effects that arise at these small distances. Furthermore, the smallness of the APDs means that a bias voltage of only 1.5 V is required to achieve an avalanche gain of over 10 dB with operational speeds exceeding 30 GHz. Monolithic integration of such a device into computer chips might enable applications beyond computer optical interconnects-in telecommunications, secure quantum key distribution, and subthreshold ultralow-power transistors.

Silicon p(+)-i-n(+) diode Mach-Zehnder electrooptic modulators having an ultra-compact length of 100 to 200 mum are presented. These devices exhibit high modulation efficiency, with a V(pi)L figure of merit of 0.36 V-mm. Optical modulation at data rates up to 10 Gb/s is demonstrated with low RF power consumption of only 5 pJ/bit.