Organic semiconductor-based Schottky diodes operating at 14MHz, fabricated using conventional photolithographic and etching processes, have been demonstrated. Copper phthalocyanine is the semiconductor, with gold and aluminum as the Ohmic and Schottky contacts, respectively. The organic diode based rectifier circuit generated a dc output voltage of approximately 2V at 14MHz, using an input ac signal with a zero-to-peak voltage amplitude of 5V. These devices showed little degradation under continuous ac voltage stress when operated in vacuum.

We demonstrate a systematic approach to optimize pentacene-based thin-film transistors using a photolithographic-based process to integrate basic circuit components such as organic-based diodes, transistors, and capacitors to fabricate circuits such as inverters, ring oscillators, current mirrors, and rectifiers for radio-frequency identification and flexible display applications. Excellent threshold voltage control among transistors is demonstrated with a 2ϫ reduction in threshold voltage ͑V T ͒ standard deviation. Our integration methodology includes a seven-mask photolithography process that incorporates several discrete devices built with pentacene as the semiconductor and parylene as the gate dielectric and interlevel dielectric. In addition, the maximum temperature for all processes is 120°C.In recent years pentacene-based thin-film transistors ͑TFTs͒ have seen significant improvements in device performance. 1 Pentacenebased TFT performance is now comparable to hydrogenated amorphous silicon ͑a:Si:H͒ TFTs. 2,3 However, in order to become pervasive, pentacene-based TFTs must show good transistor performance and reproducible transistor parameters such as mobility, threshold voltage, and drive current. In this paper we introduce a gate dielectric process that provides significantly reduced variability in threshold voltage.Similar to Si-based complementary metal-oxide-semiconductor technology, gate insulator type and quality are critical to achieve the desired device performance for organic TFTs. For example, in pentacene-based transistors, device performance is strongly dependent on the pentacene/dielectric interface and pentacene film morphology. Both of these properties can be affected by pentacene deposition conditions and surface quality of the gate dielectric. 4 For this reason, a pristine gate dielectric surface is required for the deposition of pentacene, allowing the integration of several discrete devices to fabricate complex circuits.Typical TFT performance evaluation metrics include mobility, threshold voltage, on/off ratio, and subthreshold slope. Threshold voltage variation among devices must be minimized in order to realize long-term circuit operation. Utilizing a gate-last process with parylene as the gate dielectric, pentacene TFTs with a threshold voltage of −2.3 Ϯ 0.27 V have been demonstrated. In addition to the circuit performance implications, it is also important that pentacene-based devices be photolithographically integrated with other circuit components. This will ultimately allow organic TFT ͑OTFTs͒ to enter mainstream fabrication. In this paper we report on systematic device performance improvement of a photolithographicbased process using pentacene as the semiconductor, where the maximum processing temperature is Ͻ120°C to provide compatibility with mainstream polymer substrates such as polyethylene naphthalate ͑PEN͒. Device improvement is primarily achieved by varying pentacene deposition conditions, such as substrate temperature, and by controlling the quality of the gate dielectr...

Pentacene-based organic thin-film transistors have been fabricated using photolithography and the bottom contact structure using parylene as the gate dielectric. Device performance was optimized by varying the thickness ratio of pentacene to Au contacts. Contact resistance dependence on the pentacene/Au thickness ratio (r=tpen∕tAu) was extracted using the transfer-length method [D. K. Schroder, Semiconductor Material and Device Characterization (Wiley, New York, 2006), pp. 184–199; Necliudov et al., Solid-State Electron. 47, 259 (2003)]. In this paper, we show that the effect of parasitic resistance and pentacene film morphology on device performance can be decoupled. Film morphology and microstructure are reported as a function of pentacene thickness and the correlation with transistor field-effect mobility is discussed.

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