on-current I c2on is larger than the off-state current I c2off , and a large on-current through the passives causes larger loss. MEASUREMENT RESULTSThe VCOs were designed and fabricated in the TSMC 0.18 lm 1P6M CMOS technology. Figure 3 shows the micrograph of the proposed VCO with a chip area of 0.991 3 0.815 mm 2 including all test pads and dummy metal. Four inductors L are shown. With the supply voltage of V dd 5 0.8 V, the low-/high-band current and power consumption of the core VCO are 6.55/6.85 mA and 5.24/5.48 mW, respectively. Figure 4 shows the tuning ranges of the oscillation frequency while varying V tune . While the control voltage V tune was tuned from 0 to 2.0 V, the VCO operates between 4.5/7.18 and 4.64/7.55 GHz. Figure 4(a) shows the output spectrum at 4.63 GHz, with 211.88 dBm output power. Figure 5(b) shows the output spectrum at 7.46 GHz, with 22.04 dBm output power. The measured high-band/lowband phase noise shown in Figure 6 is 2124.25/2115.84 dBc/ Hz at 1 MHz offset frequency from the center frequency. The measured phase noise shows the 1/Dx 2 -dependence at the offset frequency greater than 1 MHz. and the 1/Dx 3 -dependence at the offset frequency between 100 KHz and 1 MHz. The high-/lowband figure of merit (FOM) is 2194.25/2182.29 dBc/Hz. The FOM is calculated using the equation defined bywhere L{Dx} is the single side-band phase noise measured at Dx offset from x o carrier frequency and P DC is DC power consumption in mW. Table 1 is the performance comparison. CONCLUSIONA novel dual-band standing wave VCO with LH LC network has been proposed and successfully implemented. The dual-band function is based on fundamental and harmonic mode switching using MOSFET as the switching device. The dual-band operation has been obtained by exciting harmonic-mode operation using the MOSFET switch without the need to reconfigure the LH LC network. The VCO generates differential signals in the high-band frequency range of 7.18-7.55 GHz and in the lowband frequency range of 4.5-4.64 GHz. The measured data show the proposed fundamental and high-order harmonic mode switching technique can be used to design a dual-band VCO with good FOM. ACKNOWLEDGMENTThe experimental support of CIC is acknowledged. REFERENCES 1.

of SCS, we choose one kind of signal source, which can generate two continuous waves simultaneously and the phase difference between two outputs of this source can be set manually. At each phase difference between S 1 and S 2 , the efficiency of LINC is measured. Finally, we obtain the whole CW power efficiency curve, which is shown in Figure 7.Actually, the linearity of LINC in this method will worsen because the gain of PAs is not constant when the impedances seen by them vary with the phase difference. This problem can be solved by other linearity techniques such as digital predistortion. CONCLUSIONSIn this article, a new impedance match method is proposed to achieve high efficiency at back-off power of LINC with Chireix combiner. To verify this method, PAs and serial Chireix combiner are implemented and measured in WCDMA frequency band. From the measurement, we can see this match method is available and convenient for tuning work. To obtain maximum output power of LINC, both PAs are matched to the impedance at the peak of Pout, disregarding the efficiency. To obtain maximum back-off efficiency of LINC, only the two additional transmission lines need to be tuned. This separation of tuning work is popular for PA designers and makes the implementation convenient.ABSTRACT: A fourth-order resonator has been implemented to design a 65 GHz injection-locked frequency divider (ILFD) implemented in a 90 nm CMOS process. The ILFD is realized with a cross-coupled nMOS LC-tank oscillator with an inductor switch for frequency band selection. The LC tank can be a second-or fourth-order resonator depending upon the on/off state of a switch across a series-tuned inductor. Measurement results show that at the supply voltage of 0.5 V, the free-running frequency is from 8.68 (16.147) to 9.928 (17.89) GHz for the low-ABSTRACT: In this letter, a compact dual-band monopole antenna operating at 2.45 GHz and 5.8 GHz bands using a CPW-fed and parasitic spiral elements is presented. The monopole element creates the upper ISM band at 5.8 GHz, and the two spiral resonators is used both for impedance matching and providing the lower ISM band at frequency of 2.45 GHz. A prototype of the proposed antenna was fabricated and tested. The experimental results are presented and discussed. A good agreement between simulated and measured results is obtained.

band merged into one, and the impedance bandwidth increased. The existence of the shortest arm of a C-shaped stub-1 (L st2 ) and a stub-2 (L st3 ) caused the highest resonant frequency to decrease and the impedance bandwidth to increase, as shown in Figure 2(c). Therefore, the impedance matching of the proposed antenna can be independently controlled for each frequency band. The antenna was designed and analyzed using the Ansoft High-Frequency Structure Simulator (HFSS V11) [8] and the optimal design parameters discovered were L ¼ L st1 ¼ 16 mm, L st2 ¼ 7 mm, and L st3 ¼ 6 mm. RESULTSABSTRACT: This article presents an eight-phase divide-by-4 silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) injection-locked frequency divider (ILFD). The ILFD is based on a four-stage ring oscillator and was fabricated in the 0.35 lm SiGe 3P3M BiCMOS technology. The divide-by-4 function is performed by injecting a signal to the base of the tail HBT. At the supply voltage V dd of 1.3 V and at the incident power of 0 dBm, the locking range is about 2.55 GHz from the incident frequency 12.7 to 15.25 GHz. The die area is 0.54 Â 0.54 mm 2 .ABSTRACT: Dual-wavelength clock recovery (CR) based on Stimulated Brillouin Scattering is realized. The maximum frequency spacing of two channels is theoretically analyzed and experimentally demonstrated. The total wavelength span of the CR scheme is investigated to be about 3.37 nm in experiment. Multiwavelength CR can be implemented within the span.

No abstract

ABSTRACT:The design of a frequency divider

No abstract