Thick electrode with high-areal-capacity is a practical and promising strategy to increase the energy density of batteries, but development toward thick electrode is limited by the electrochemical performance, mechanical properties, and manufacturing approaches. In this work, we overcome these limitations and report an ultrathick electrode structure, called fiberaligned thick or FAT electrode, which offers a novel electrode design and a scalable manufacturing strategy for high-areal-capacity battery electrodes. The FAT electrode uses aligned carbon fibers to construct a through-thickness fiber-aligned electrode structure with features of high electrode material loading, low tortuosity, high electrical and thermal conductivity, and good compression property. The low tortuosity of FAT electrode enables fast electrolyte infusion and rapid electron/ion transport, exhibiting a higher capacity retention and lower charge transfer resistance than conventional slurry-casted thick electrode design.
With the rapid development of nanomanufacturing, scaling up of nanomaterials requires advanced manufacturing technology to composite nanomaterials with disparate materials (ceramics, metals, and polymers) to achieve hybrid properties and coupling performances for practical applications. Attempts to assemble nanomaterials onto macroscopic materials are often accompanied by the loss of exceptional nanoscale properties during the fabrication process, which is mainly due to the poor contacts between carbon nanomaterials and macroscopic bulk materials. In this work, we proposed a novel cross-scale manufacturing concept to process disparate materials in different length scales and successfully demonstrated an electrothermal shock approach to process the nanoscale material (e.g., carbon nanotubes) and macroscale (e.g., glass fiber) with good bonding and excellent mechanical property for emerging applications. The excellent performance and potentially lower cost of the electrothermal shock technology offers a continuous, ultrafast, energy-efficient, and roll-to-roll process as a promising heating solution for cross-scale manufacturing.
In the present work, the impact of ZrO 2 gate dielectric thickness on the electrical performance of TiO 2 thin film transistors (TFTs) is systematically investigated. Exhaustive electrical measurements on TFTs, metal−insulator−metal, and metal−oxide−semiconductor capacitors are carried out with varying ZrO 2 dielectrics of different thicknesses. It is found that the ZrO 2 possesses an outstanding thickness scalability, providing reliable dielectric properties under an ultrathin physical thickness of 5 nm, while further reduction in ZrO 2 thickness would lead to a breakdown of the TFTs, indicating the physical limitations for the ultrathin ZrO 2 dielectrics. The TiO 2 TFTs with the 5 nm-thick ZrO 2 dielectric exhibit an enhanced electrical performance, including a high on/off current ratio (I on /I off ) of 7.7 × 10 8 , a nearly ideal subthreshold (SS) of 72 mV/dec, and a high electron mobility (μ eff ) of 5.74 cm 2 •V −1 •s −1 under an ultralow voltage of 2 V. Such prominent electrical characteristics with a battery-drivable low-voltage operation prove the suitability of the TiO 2 TFTs for Internet of Things applications. This comprehensive study, revealing the behaviors of leakage current, oxide capacitance, oxide charges, and interface traps with respect to the ZrO 2 thickness, sheds light on the quality and scalability of the ZrO 2 dielectrics that can be extended to other channel materials, and also offers a framework for evaluating the material quality of other dielectrics. Furthermore, from a material point of view, the underlying physical reasons for the excellent ZrO 2 thickness scalability are believed to be (1) the smooth surfaces of TiO 2 and ZrO 2 , (2) the well-structured ZrO 2 without detectable oxygen-related defects, and (3) the large conduction band offset between ZrO 2 and TiO 2 . Overall, this study not only shows that the TiO 2 TFTs hold great potential to empower future IoT applications, but also provides important guidance regarding dielectric scaling and quality evaluation in the nanometer scale.
To evaluate performances of a back-illuminated scientific CMOS (sCMOS) camera for astronomical observations, comparison tests between Andor Marana sCMOS and Andor iKon-L 936 CCD cameras were conducted in a laboratory and on a telescope. The laboratory tests showed that the readout noise of the sCMOS camera is about half lower, the dark current is about 17 times higher, the dynamic range is lower in the 12-bit setting and higher in the 16-bit setting, and the linearity and bias stability are comparable relative to those of the CCD camera. In field tests, we observed the open cluster M67 with the sCMOS and CCD cameras on a 60 cm telescope. Unlike the CCD camera, the sCMOS camera has a dual-amplifier architecture. Since a 16-bit image of the sCMOS camera is composed of two 12-bit images sampled with 12-bit high gain and low gain amplifiers simultaneously, it is not real 16-bit output data. The evaluation tests indicated that the dual-amplifier architecture of the sCMOS camera leads to a decline of photometric stability by about six times around specific pixel counts. For photometry of bright objects with similar magnitudes that require high frame rates, the sCMOS camera under 12-bit setting is a good choice. Therefore, the sCMOS camera is fitted with survey observations of variable objects requiring short exposure times, mostly less than 1 s, and high frame rates. It also satisfies the requirements for an offset guiding instrument owing to its high sensitivity, high temporal resolution and high stability.
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