Vertical optofluidic biosensors based on refractive index sensing promise highest sensitivities at smallest area foot-print. Nevertheless, when it comes to large scale fabrication and
With the aim of achieving high efficiency, cost-effectiveness, and reliability of solar cells, several technologies have been studied. Recently, emerging materials have appeared to replace Si-based cells, seeking economic fabrication of solar cells. Thin-film solar cells (TFSCs) are considered strong candidates for this mission, specifically perovskite-based solar cells, reporting competitive power convergence efficiencies reaching up to 25.7%. Substantial efforts have been invested in experimental and research work to surpass the Si-based cells performance. Simulation analysis is a major tool in achieving this target by detecting design problems and providing possible solutions. Usually, a TFSC adopts p-i-n heterojunction architecture by employing carrier transport materials along with the absorber material in order to extract the photogenerated electrons and holes by realizing a built-in electric field. Eventually, this dependency of conventional heterojunction TFSCs on carrier transport layers results in cost-ineffective cells and increases the possibility of device instability and interface problems. Thus, the design of p-n homojunction TFSCs is highly desirable as an essential direction of structural innovation to realize efficient solar cell operation. In this review, a summary of the fundamentals of TFSC materials, recent design and technology progress, and methodologies for improving the device performance using experimental research studies will be discussed. Further, simulation analysis will be provided by demonstrating the latest research work outcomes, highlighting the major achievements and the most common challenges facing thin film homojunction solar cell structures and the methods to improve them.
High mobility materials are being studied to replace Si with the aim of enhancing the performance of nanoelectronic devices. Ge and III-V channels have recently received a lot of attention, where the combination of III-V channels in n-MOSFETs and Ge channels in p-MOSFETs integrated on Si substrates is regarded as a promising CMOS design. Ge integrated on Si is a very promising choice due to its superior transport properties and compatibility to CMOS technology. The main challenges faced by Ge-based FETs are the channel/gate interface quality, crystal defects due to integration on Si and the smaller bandgap compared to Si, which leads to elevated band-to-band-tunnelling leakage currents, setting limitations on the achievable off state current (I OFF ). In this work, we present results on the fabrication and characterization of vertical Ge-based p-channel planar doped barrier FET together with a simulation model based on extracted material data from our experimental work and literature. Based on the model, a design of a modified device using both planar doping and a heterostructure in the channel is presented. The channel engineered design uses a Ge/Si x Ge 1-x-y Sn y heterostructure, which is lattice matched to Ge, within the channel at different positions. The results show improved performance; the larger bandgap of the ternary alloy Si x Ge 1-x-y Sn y compared to Ge leads to a suppression of the I OFF as well as a reduced subthreshold swing, making the heterostructure device promising for energy efficient FET applications.
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