A pnn double heterostructure optoelectronic switch with dual extractor electrodes was dynamically operated as an optical memory with the resulting achievement of 20 μW holding power. This value represents a reduction in holding power of about three orders of magnitude as compared to that of conventional light-emitting optical bistable devices. Complete operation, involving optical writing, regeneration, and high-speed erasing of written data through a dual extractor-electrodes configuration, was carried out with a simple driving scheme.
A photoeletronic bistable device with selectable light output channels has been fabricated for implementation in photonic switching and processing systems. The device is a variation of the vertical to surface transmission electrophotonic device. Output in the stimulated light emission mode was successfully obtained from different waveguide channels by external electronic switching. Output channels could be switched at a rate of 400 Mb/s. The potential versatility of this device has been experimentally confirmed in programmable or switchable optical interconnections.
High speed response in a three terminal p
n
p
n double heterostructure optoelectronic gated thyristor is demonstrated. The gate electrode on the active layer is operated to sweep out excess carriers in the active layer. The turn-off delay time has been measured to be 5 ns, which is two orders of magnitude improvement compared with that for the two terminal mode operation. Furthermore, it has been shown that the turn-off delay time cannot be estimated from the conventional 90-10% fall time.
To perform image or arithmetic processing optically, it is necessary that a large number of required optical processors be connected in a series. For such cascade connections, however, coding and decoding processes are undesirable because of the necessity for the complicated hardware that often results. We propose here a new logic algorithm for application to cascade connections, which utilizes, in place of coding and decoding processes, true logic signals and their complements. Its optical implementation is also discussed. A processing module is constructed from electro-photonic devices referred to as vertical to surface transmission electro-photonic devices, a ferroelectrical liquid-crystal spatial light modulator, and a planar microlens array. Its logic operations are successfully demonstrated.
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