The mechanism of leakage current reduction in phosphorus-doped po]ysilicon oxide by high temperature annealing prior to low temperature oxidation was investigated by bias polarity dependence of oxide leakage current, polysilicon grain size measurement, and polysilicon surface observation. Increased phosphorus concentration in polysilicon makes the grains larger and smoothens the surface roughness; consequently, the highest electric field is obtained at the phosphorus concentration of about 6 • 102~ cm-'~. Even at the optimum concentration, leakage current due to field enhancement at the interface between polysilicon oxide and polysilicon is still high. Leakage current can be reduced remarkably by high temperature annealing prior to oxidation, especially at the optimum concentration. The annealing effect is explained by interface flatness improvement due to grain growth during annealing and increase of phosphorus atoms in grains. Phosphorus atom migration from the grain boundaries inside the grains is considered to enhance the grain growth.Thermal oxide grown on heavily doped polysilicon is commonly used as the dielectric of MOS LSI's. Particularly, in a floating polysilicon gate EPROM's and EEPROM cells polysilicon oxide (poly-oxide) hardness to the electric field plays an important role in determining data retention characteristics. However, poly-oxide is well known to be more conductive than bulk silicon oxide, which has been attributed mainly to surface roughness at the poly-oxide/polysilicon interface.A smoother interface is obtained by oxidizing polysilicon at higher temperatures (1), where the viscous flow of the oxide and the small dependence of oxidation rate on polysilicon orientation can moderate the surface roughness generated by oxidation. A similar improvement in the surface roughness is attained by using polysilicon with amorphous structure (2). Also, high temperature annealing just after polysilicon oxidation improves the breakdown field (3). This improvement is explained by the release of stress in the structure, which prevents further flawing induced after the oxidation and thermal cycling.In this paper, the role and mechanism of high temperature annealing prior to oxidation of phosphorus-doped polysilicon is investigated as an effective means of improving the reliability of low temperature oxidized polyoxide. The bias polarity dependence of Fowler-Nordheim tunneling current through poly-oxide, measurement of the polysilicon grain size, and observation of the oxidized polysilicon surface using TEM and replica techniques are reported. ExperimentalPolysilicon films with thickness of 0.40 ~m were deposited by low pressure chemical vapor deposition (LPCVD) at 620~ onto thermally oxidized Si substrates and were doped with phosphorus by diffusion at 900~ from a POC13 source. Prior to oxidation, 0.30 ~m thick CVD oxide films were deposited onto the doped polysilicon films, and annealing was performed at 950 ~ and ll00~ for 10 min in N~ atmosphere. Some of the Si substrates remained unannealed, as shown ...

Diffusion of carbon in SiO2 films and its segregation at the Si/SiO2 interface were investigated using carbon-incorporated borophosphosilicateglass (BPSG) films and carbon-implanted SiO2 films. It was found that carbon atoms diffuse in SiO2 film at a temperature as low as 500° C. Carbon atoms segregated at the Si/SiO2 interface and induced positive charge. The positive charge density was proportional to the segregated carbon concentration. Field emission transmission electron microscopy (FE-TEM) and electron energy loss spectra (EELS) observations revealed that carbon atoms exist on the SiO2 side of the interface, and another carbon-rich phase is formed in S i O 2.

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A process consisting of the deposition of amorphous silicon at low temperatures and subsequent annealing has been proposed for fabricating a boron-doped pelycrystalline silicon film with a low resistivity. This process realized large grain growth up to 3 to 5 ~m, leading to a low resistivity of 1.4 m~ • cm, which one-half to about one-third compared with that of direct deposited boron doped polysilicon. In addition to this, extremely low deposition temperature (~350°C) using a Si2HJB2H6 mixture attained uniform boron concentration across the wafers.

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