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In the past several years, we have made significant progress in the growth of CdTe buffer layers on Si wafers using molecular beam epitaxy (MBE) as well as the growth of HgCdTe onto this substrate as an alternative to the growth of HgCdTe on bulk CdZnTe wafers. These developments have focused primarily on mid-wavelength infrared (MWIR) HgCdTe and have led to successful demonstrations of high-performance 1024 ϫ 1024 focal plane arrays (FPAs) using Rockwell Scientific's double-layer planar heterostructure (DLPH) architecture. We are currently attempting to extend the HgCdTe-on-Si technology to the long wavelength infrared (LWIR) and very long wavelength infrared (VLWIR) regimes. This is made difficult because the large lattice-parameter mismatch between Si and CdTe/HgCdTe results in a high density of threading dislocations (typically, Ͼ5E6 cm Ϫ2 ), and these dislocations act as conductive pathways for tunneling currents that reduce the R o A and increase the dark current of the diodes. To assess the current state of the LWIR art, we fabricated a set of test diodes from LWIR HgCdTe grown on Si. Silicon wafers with either CdTe or CdSeTe buffer layers were used. Test results at both 78 K and 40 K are presented and discussed in terms of threading dislocation density. Diode characteristics are compared with LWIR HgCdTe grown on bulk CdZnTe.

We have fabricated a series of 256 pixel 3 256 pixel, 40 mm pitch LWIR focal plane arrays (FPAs) with HgCdTe grown on (211) silicon substrates using MBE grown CdTe and CdSeTe buffer layers. The detector arrays were fabricated using Rockwell Scientific's double layer planar heterostructure (DLPH) diode architecture. The 78 K detector and focal plane array (FPA) performance are discussed in terms of quantum efficiency (QE), diode dark current and dark current operability. The FPA dark current and the tail in the FPA dark current operability histograms are discussed in terms of the HgCdTe epitaxial layer defect density and the dislocation density of the individual diode junctions. Individual diode zero bias impedance and reverse bias current-voltage (I-V) characteristics vs. temperature are discussed in terms of the dislocation density of the epitaxial layer, and the misfit stress in the epitaxial multilayer structure, and the thermal expansion mismatch in the composite substrate. The fundamental FPA performance limitations and possible FPA performance improvements are discussed in terms of basic device physics and material properties.

INTRODUCTIONNucleation and subsequent material characteristics of CdTe-epitaxial layers on high-Miller-index Si surfaces are of interest from a crystallographic point of view. Additionally, understanding the nature and quality of epitaxy on different Si surfaces is important because composite substrates [Cd(Zn)Te/ZnTe/Si], if produced with high crystal perfection, can be used to fabricate HgCdTe-based, large-format, infrared focalplane arrays. To this end, a decade of research has been conducted on the growth of Cd(Zn)Te(112)/ Si(112) because this is currently the preferred orientation for HgCdTe grown by molecular-beam epitaxy (MBE). However, only minimal work has been done to fully understand the nucleation process of II-VI compounds on nonpassivated and arsenic-passivated Si(112) and other high-Miller-index surfaces. Results from these initial studies indicate that Te 2 exposure of arsenic-passivated Si(112)-nominal substrates leads to a Te surface coverage of 20-30%. 1,2 From this information, a step-flow growth model was developed for CdZnTe growth on Si(112)-nominal substrates.Several groups have also reported on the MBE growth of Cd(Zn)Te on Si (112) substrates misoriented toward the [111] direction; however, only a few studies address the MBE-growth process on Si(112) substrates misoriented away from the [111] direction or on even higher Miller-index surfaces, such as Si(113). 3-6 Material properties from these studies vary greatly depending on the precise nucleation and growth method used. Also indicated is that the CdTe-epilayer orientation does not necessarily reproduce the Si-substrate orientation. However, no model was presented that would explain the change in epilayer orientation. Therefore, to address these issues, a systematic investigation on nucleation properties as well as an investigation on the overall epilayer-material properties as a function of Si orientation was undertaken. The family of Si{111}-type surfaces that are off-cut from {111} in the range of 0-30°were studied. Specifically, passivation, nucleation, and epitaxial growth on Si(111), Si(112) tilted 5°toward [111], Si(112) nominal, Si(112) tilted 5°away from [111], and Si(113) substrates were investigated. A detailed study of the atomic configuration of these and other Si surfaces has been reported. 7 Figure 1 shows the ideal, nonprimitive surface structures of Si(112) and Si (113) Tellurium-adsorption studies were conducted on {111}-type Si surfaces that are off-cut from the {111} in the range of 0-30°on both nonpassivated-and arsenicpassivated Si surfaces. Relative surface coverages as a function of Te exposure time and Si-surface orientation were obtained with in-situ x-ray photoelectron spectroscopy (XPS). The XPS results indicate that Te coverage on arsenicpassivated Si surfaces increases as the step density of the surface increases. In contrast, Te-adsorption studies conducted on nonpassivated-Si surfaces showed no dependence between Te coverage and the surface-step density. Subsequent ZnTe and CdTe molecular-beam epitaxial ...

It has been reported that the basic electrical properties of n-type long wave length infrared (LWIR) HgCdTe grown on silicon, including the majority carrier mobility (l e ) and minority carrier lifetime (s), are qualitatively comparable to those reported for LWIR HgCdTe grown on bulk CdZnTe by molecular beam epitaxy (MBE). Detailed measurements of the majority carrier mobility have revealed important differences between the values measured for HgCdTe grown on bulk CdZnTe and those measured for HgCdTe grown on buffered silicon substrates. The mobility of LWIR HgCdTe grown on buffered silicon by MBE is reported over a large temperature range and is analyzed in terms of standard electron scattering mechanisms. The role of dislocation scattering is addressed for high dislocation density HgCdTe grown on lattice-mismatched silicon. Differences between the low temperature mobility data of HgCdTe grown on bulk CdZnTe and HgCdTe grown on silicon are partially explained in terms of the dislocation scattering contribution to the total mobility.