This paper describes the jitter analysis of such practical sampling systems as A-to-D converters, sample-and-hold circuits, and samplers. A new model for estimating jitter is proposed. In this model, total jitter is composed of sampling circuit jitter, analog input signal jitter, and sampling clock jitter. Using this model, jitter is broken up into three components. To evaluate the model, a precise method for measuring jitter is devised. This method is based on sampling sine-wave signal-to-noise ratio calculations, and it enables separation of jitter and amplitude noise. Finally, the performance limit of converters is discussed as evaluated by the model.
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