Abstract-The development of a test chip that will be used to evaluate a hermetic and biocompatible package for the driving CMOS circuitry of a retinal prosthesis is described. The package design is estimated to be about 2 x 2 x 0.3 mm 3 and will be formed by conformal layers of parylene and a metal (e.g. titanium) as inner and outer protections, respectively. The test chip has been specifically designed for evaluation of the packaging technology. It consists of many blocks of analog and digital components as well as relative humidity and temperature sensors. The test chip has more probe points than a typical chip, allowing a more thorough evaluation of circuit behavior during the testing. This chip will first be coated in a layer of parylene C and soaked in heated isotonic saline for an extended period of time. Every block in the chip will then be tested for functionality using the surface probe points. The next step is to coat the surface of another test chip with parylene and a metal and repeat these soak tests. The results will then be analyzed and mean time-to-failure for the different samples will then be computed. Using the accelerated testing paradigm, these results will then be extrapolated to mean time-to-failure in the operating intraocular environment. Parylene test structures have already undergone an accelerated lifetime test and results have been analyzed.
A spike derivative based feature extraction algorithm is reported in this paper. The theoretical framework includes neuronal geometry signatures and noise shaping. Through evaluating neuronal geometry signatures with compartment model, we obtain improved differentiation among similar spikes by emphasizing high frequency signal spectrum. Through studying the noise properties, we find the total noise reduces by taking the derivative of spikes, which is the simplest frequency shaping filter boosting the high frequency signal spectrum. In addition, a preliminary hardware implementation to extract spike features has been realized using an integrated microchip interfaced with a personal computer.
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