Vacuum channel transistors are potential candidates for low-loss and high-speed electronic devices beyond complementary metal-oxide-semiconductors (CMOS). When the nanoscale transport distance is smaller than the mean free path (MFP) in atmospheric pressure, a transistor can work in air owing to the immunity of carrier collision. The nature of a vacuum channel allows devices to function in a high-temperature radiation environment. This research intended to investigate gate location in a vertical vacuum channel transistor. The influence of scattering under different ambient pressure levels was evaluated using a transport distance of about 60 nm, around the range of MFP in air. The finite element model suggests that gate electrodes should be near emitters in vertical vacuum channel transistors because the electrodes exhibit high-drive currents and low-subthreshold swings. The particle trajectory model indicates that collected electron flow (electric current) performs like a typical metal oxide semiconductor field effect-transistor (MOSFET), and that gate voltage plays a role in enhancing emission electrons. The results of the measurement on vertical diodes show that current and voltage under reduced pressure and filled with CO2 are different from those under atmospheric pressure. This result implies that this design can be used for gas and pressure sensing.
High-k metal gate technology improves the performance and reduces the gate leakage current of metal-oxide-semiconductor field-effect transistors (MOSFETs). This study investigated four different work function metal (WFM) stacks in the gate of fin field-effect transistors (FinFETs) on the same substrate. These devices not only successfully produced distinct levels of threshold voltages (|V t |) but also converted n-to p-type features merely by adding p-type WFM in the gate of the MOSFETs. All of the devices satisfied short-channel effects with shrinking channel length. The gate-to-body electric field induced drain leakage due to the nature of bulk FinFETs. However, the n-and p-type gate stacks presented different gate current leakage. For reliability, hot carrier injection (HCI) could have a higher reliability impact than the negative-bias temperature instability (NBTI) for p-MOSFET, although the stress voltage of HCI was roughly half that of the NBTI test. This multi-threshold voltage tuning allows designers to design CMOS and choose the trade-off between low power consumption and high performance on the same platform.
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