We present a new memory device using two self-aligned silicon wires for charge storage. Programming is by channel hot electron injection, and a large 2 nd bit V T window ( >3V) for multi-bit/cell operation is demonstrated. Erasing is by edge-enhanced +FN tunneling. Both program and erase operations can be performed at < 10us and the device is intrinsically immune to over-erasure. This new Si-wire device shows small program disturbance, small cycling-induced degradation, and adequate retention performance. This new device has all the benefits of nanocrystal device but is readily made by standard CMOS process and without the Coulomb blockade limitation. It is also more scalable than conventional floating gate devices.
An in situ air gaps fill-in approach was investigated by conducting a convenient way in dual-beam FIB. We employed a well-controlled deposition to precisely fill carbon into air gaps. It greatly reduced formation of the artifacts and avoided the profiles of air gaps by reducing striations and damages during FIB milling. Generally, the effect of air gaps between wordlines or between metal lines, as well as some unexpected defect voids can be eliminated in most cases if this ideal method is applied.
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