Hot-electron-based solar energy conversion with metal-semiconductor nanodiodes Young Keun Lee, Hyosun Lee, Changhwan Lee et al. Advances in graphene-based optoelectronics, plasmonics and photonics Bich Ha Nguyen and Van Hieu Nguyen Photoresponse Enhancement in Graphene/Silicon Infrared Detector by Controlling Photocarrier Collection Xin Tang, Hengkai Zhang, Xiaobing Tang et al. Amplification of hot electron flow by the surface plasmon effect on metal-insulator-metal nanodiodes Changhwan Lee, Ievgen I Nedrygailov, Young Keun Lee et al. Light-matter interaction of 2D materials: Physics and device applicationsHot electrons excited by plasmon resonance in nanostructure can be employed to enhance the properties of photodetectors, even when the photon energy is lower than the bandgap of the semiconductor. However, current research has seldom considered how to realize the efficient collection of hot electrons, which restricts the responsivity of the device. In this paper, a type of plasmonic photodetector based on asymmetric nanogap electrodes is proposed. Owing to this structure, the device achieves responsivities as high as 0.45 and 0.25 mA/W for wavelengths of 1310 and 1550 nm, respectively. These insights can aid the realization of efficient plasmon-enhanced photodetectors for infrared detection.
Here, a broadband electrostatic discharge (ESD) protection circuit using area-efficient multi-layer helical inductors is presented. The proposed concept was verified in a 0.18 μm 1P6M CMOS process, and the circuit area is only 54 × 63 μm 2 . The measurement results show that a bandwidth of around 30 GHz is achieved, and the impedance matching is kept under -20 dB up to 40 GHz. The measured TLP and VF-TLP currents reach 2.19 and 5.80 A, respectively, which indicates a good ESD robustness.
An experimental investigation reports on the effectiveness of multipath and metal-stacking structure in regard to quality factor improvement for on-chip 8-shaped inductors on standard CMOS process. It is found that the multi-path structure has little positive impact on the 8-shaped inductors, while the metal-stacking structure improves quality factor significantly. For a 0.5 nH 8-shaped inductor with top two layers metal-stacking, a good differential quality factor of ∼15 at 10 GHz and ∼17 at 13 GHz is obtained, which makes the inductor suitable for the design of low-cost and interference-immune over-10 GHz radio-frequency and high-speed integrated circuits.
To address the problems of low network accuracy, slow speed, and a large number of model parameters in printed circuit board (PCB) defect detection, an improved detection algorithm of PCB surface defects based on YOLOv5 is proposed, named PCB-YOLO, in this paper. Based on the K-means++ algorithm, more suitable anchors for the dataset are obtained, and a small target detection layer is added to make the PCB-YOLO pay attention to more small target information. Swin transformer is embedded into the backbone network, and a united attention mechanism is constructed to reduce the interference between the background and defects in the image, and the analysis ability of the network is improved. Model volume compression is achieved by introducing depth-wise separable convolution. The EIoU loss function is used to optimize the regression process of the prediction frame and detection frame, which enhances the localization ability of small targets. The experimental results show that PCB-YOLO achieves a satisfactory balance between performance and consumption, reaching 95.97% mAP at 92.5 FPS, which is more accurate and faster than many other algorithms for real-time and high-precision detection of product surface defects.
A new switched-inductor voltage controlled oscillator (VCO) scheme based on tapped vertical solenoid inductors is presented. With tapping ports, various effective inductances are selected by switches for multi-band operation. As a proof of concept, two VCOs, with one and two tapping ports separately, are implemented in a 0.18 mm 1P6M standard CMOS. Because of the vertical structure of the inductors, the new scheme consumes much less area than the conventional switch-inductor VCOs. The measured frequency bands of the VCOs are located between 1.96 and 3.49 GHz, and the measured phase noise at 1 MHz offset is between 2115.4 and 2118.5 dBc/Hz across all bands under power consumption of 14.4 mW (8 mA, 1.8 V).Introduction: With the increasing demand on low-cost multi-standard, multi-band wireless and wireline systems, voltage controlled oscillators (VCOs) that are able to cover multiple frequency bands attract more attention. Owing to the stringent phase noise performance requirement, LCVCOs are preferred. Because the on-chip inductors are usually fixed, the tuning range of the VCO is therefore limited by the low C max /C min ratio of varactors. Many researches have been devoted to inductance tuning schemes, such as the fourth-order resonator [1], the transformerbased resonator [2], magnetically tuning architecture [3], and so forth, which are employed along with conventional capacitance tuning to enhance frequency range and lower the VCO gain variation. Among them, the switched-inductor structure [4-6] is relatively simple, but considered as an inferior structure because of the negative effects of the 'real' switches. Though the parasitic on-resistances of the switches degrade the phase noise performance, it was concluded that the on-resistances and other losses associated with the switches can be made sufficiently low [6]. However, two additional planar inductors are used in previous works, because on-chip inductors are always the most area-consuming devices, and this scheme consumes large chip area. In this Letter, the tapped vertical solenoid inductors are used for switched-inductor VCOs, which benefit from the multilayer structure and help to reduce chip area and cost. Moreover, the vertical solenoid inductors are considered to have higher peak quality factor and self-resonance frequency than planer inductors [7].
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