The ever-shrinking circuit device dimensions challenge lithographers to explore viable patterning for the 32 nm halfpitch node and beyond. Significant improvements in immersion lithography have allowed extension of optical lithography down to 45 nm node and likely into early 32 nm node development. In the absence of single-exposure patterning solutions, double patterning techniques are likely to extend immersion lithography for 32 nm node manufacturing. While several double patterning techniques have been proposed as viable manufacturing solutions, cost, along with technical capability, will dictate which candidate is adopted by the industry.Dual-tone development (DTD) has been proposed as a potential cost-effective double patterning technique. 1 Dual-tone development was reported as early as in the late 1990's by Asano. 2 The basic principle of dual-tone imaging involves processing exposed resist latent images in both positive tone (aqueous base) and negative tone (organic solvent) developers. Conceptually, DTD has attractive cost benefits since it enables pitch doubling without the need for multiple etch steps of patterned resist layers. While the concept for DTD technique is simple to understand, there are many challenges that must be overcome and understood in order to make it a manufacturing solution.This work presents recent advances and challenges associated with DTD. Experimental results in conjunction with simulations are used to understand and advance learning for DTD. Experimental results suggest that clever processing on the wafer track can be used to enable DTD beyond 45 nm half-pitch dimensions for a given resist process. Recent experimental results also show that DTD is capable of printing <0.25 k 1 -factor features with an ArF immersion scanner. Simulation results showing co-optimization of process variables, illumination conditions, and mask properties are presented.1 "Alternative process schemes for double patterning that eliminate the intermediate etch step", M. Maenhoudt et al.,
We present results of experimental measurements, simulations, and models to better understand etching of SiN with H3PO4 in 3D NAND structures. SiN and SiO2 etch rates were measured on blanket wafers, and those etch rates were used to simulate etching of 3D NAND structures. Results show that the etching is reaction limited, and that diffusion and acid flow rate has no effect on the local etch rate, but temperature and concentration do affect the etch rate.
The performance of a new cryogenic aerosol process was evaluated for cleaning nanoparticles and providing damage-free processing. Particle Removal Efficiency (PRE) tests conducted with wet deposited 40 nm, 30 nm and 18 nm silica particles on 300 mm wafers demonstrated cleaning efficiencies above 80%. Damage-free capability of the cryogenic aerosol process was evaluated with poly-silicon lines with an aspect ratio of approximately 9:1. These results highlight the potential of this new cryogenic aerosol to provide semiconductor device yield benefits by reducing small particulate contamination without causing pattern damage.
Double patterning (DP) techniques are emerging as the dominant method to achieve the 32 nm node and beyond. While several DP approaches exist, the litho-litho-etch (LLE) process is attractive for reduced manufacturing cost. [1] Previously published LLE work explored the process latitude in the "positive/negative LLE" regime, wherein the first resist layer is imaged by positive-tone resist and the second resist layer is imaged in negative-tone. [2] In this paper, simulation-based techniques are used to determine the process latitude in the "positive/positive LLE" system. By using the same resist material for first-and second-pass lithography, optical properties are nearly matched. However, a conformal barrier film or other chemical modification must be applied to inhibit the solubility of the firstpass topography and maintain immiscibility between layers. The consequences of choosing a positive-tone resist for both the first-and second-pass are investigated for target CD at 88 nm pitch. Process latitude is characterized using full resist models, reaction-diffusion kinetic solvers, including diffusion-limiting boundary conditions.
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