Historically, the most common failure analyses metrologies have been dye-and-pull, cross-sections, microscopy, optical and SEM. Using these traditional metrologies to find a root cause from a dynamic event can be very time consuming and sometimes inconclusive. The standard methodology is to work backward to reconstruct the “event” that caused or initiated failure. Often times the root cause is not immediately obvious and design improvements require an iterative process to identify the true root cause. This approach is costly in time, materials and resources. A high speed camera (HSC) allows identification of failure from a point of initiation. Using the point of initiation concept with reconstructive modeling allows a design team to discover potential initiating sources and better match a cause to the effect and implement corrective action. This decreases development time, minimizing product design cycle and increases market opportunities.
Modal method and direct time integration analyses are two common FE approaches to simulate circuit board shock response. When using these methods, the model validation depends on comparing the simulated result with either frequency or time domain response. In the past, modal test and analysis has been the final model validation step for using modal method. We believe a shock simulation model should be revalidated following the modal validation, since the modal parameters are global measurements and the second level interconnect (SLI) reliability in shock is more related to its local board bending condition. A revalidation can be done by comparing model simulation acceleration with direct acceleration measurements on the circuit board. However, the board level acceleration may not provide an accurate picture of board level deflection or strain, leading to an incorrect conclusion of the SLI stress predicted by a model. This paper compares the application of acceleration validation method and the method using board deflection and board strain time history to achieve model validation.
This work focuses on deformation mechanisms taking place in a Printed Circuit Board (PCB) exposed to high impact shock. A combined experimental, theoretical, and numerical approach has been applied to address both the nature of the observed deformation and its modeling and test metrology implications. Experimental evidence overwhelmingly indicates that a PCB in both test and system applications undergoes nonlinear deformations. Geometric nonlinearity of board response is attributed to the elevated in-plane (membrane) stresses that develop when a drop height and/or inertia forces are significant. The impact of these stresses on deformations (board strain) was quantified using a specially designed test. Membrane stresses were also accounted for in a numerical (Finite Element Method) model developed and carefully validated in the course of this study. The model shows a very good agreement with test data. The nonlinearity of PCB deformation in shock, i.e. the fact that both bending moments and in-plane forces are present in the board has important implications on test metrology development and on correlation between the measured board strain and stresses in interconnects of surface mounted components. Of special importance is the impact that nonlinearity can have on development of transfer functions between strain measurements on system boards and strain measurements on test boards, which is also addressed in the paper.
Many electronic boards or systems exhibit nonlinear behaviors during shock or vibration tests. One of the challenges for dynamics analysis of electronic boards or systems is to deal with these nonlinearities. In order to solve the nonlinear problem, the nonlinearities need to be revealed and characterized and their effects understood. This paper demonstrates the methods in identifying the nonlinearities and supported with empirical tests. Shock, random vibration and static bending were used to reveal the board system nonlinearities. The empirical results provided direction to update shock FE models.
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