A CMOS image sensor has been designed to perform the front-end image decomposition in a Prediction-SPIHT image compression scheme. The prediction circuitry based on charge sharing is integrated inside the sensor array to perform a 3-level image decomposition. A CMOS test chip has been prototyped and tested. The test results justify the pixel design and demonstrate that lossy prediction based focal plane image compression can be realized inside the sensor pixel array to achieve a high frame rate but with much less data readout volume. Also, the sensor can be used to achieve comparable compression performance with much lower computational complexity compared to 2D discrete wavelet transform (DWT) based image compression.
An analog-to-digital converter with data compression capabilities is described. By sharing circuits between an integrating converter and a Golomb-Rice encoder it is possible to jointly perform the tasks of quantization and coding. The Golomb-Rice codes are generated during the conversion cycle by employing a shift register and a digital multiplexer. The final codeword is read out serially from the shift register. The converter can also work in a non-compressing mode. This design provides a compact circuit suitable for on-sensor compression. Simulations at the system and transistor level corroborate the validity of the design.
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