Charge-based prediction circuits for focal plane image compression

Leon, W.D.; Balkir, S.; Sayood, Khalid; Hoffman, Michael W.

doi:10.1109/iscas.2004.1329159

Cited by 4 publications

(6 citation statements)

References 11 publications

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“…In [18,[51][52][53][54], predictive coding schemes are implemented in the off-array column-level processor. Predictive coding is a very useful image-processing scheme with low computational complexity.…”

Section: On-chip Image Compression For Cmos Image Sensorsmentioning

confidence: 99%

“…An analog-predictive circuit is used to calculate both the predictive pixel value and the prediction error between the predictive value and the raw value. A more complexity version of GAP using the sum of the weighted upper, left, top left, and top right neighboring pixels is implemented in [52]. In [18,53], the median adaptive predictor (MED predictor) is implemented in the off-array logic, predicting pixel value X using the upper pixel value (denoted as N), the left pixel value (denoted as W), and the top left pixel value (denoted as NW) as expressed in…”

Section: On-chip Image Compression For Cmos Image Sensorsmentioning

confidence: 99%

“…References [22,[76][77][78][79][80] proposed an APS array integrated pixel-level parallel prediction image decomposition algorithm and Set Partitioning In Hierarchical Trees (SPIHT) coding scheme. The proposed prediction scheme enables image decomposition with lower computational complexity, while compared with standard wavelet-based algorithms as detailed in [77].…”

Section: Journal Of Sensorsmentioning

confidence: 99%

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CMOS Image Sensor with On-Chip Image Compression: A Review and Performance Analysis

Zhang

Bermak

2010

Journal of Sensors

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Demand for high-resolution, low-power sensing devices with integrated image processing capabilities, especially compression capability, is increasing. CMOS technology enables the integration of image sensing and image processing, making it possible to improve the overall system performance. This paper reviews the current state of the art in CMOS image sensors featuring on-chip image compression. Firstly, typical sensing systems consisting of separate image-capturing unit and image-compression processing unit are reviewed, followed by systems that integrate focal-plane compression. The paper also provides a thorough review of a new design paradigm, in which image compression is performed during the image-capture phase prior to storage, referred to as compressive acquisition. High-performance sensor systems reported in recent years are also introduced. Performance analysis and comparison of the reported designs using different design paradigm are presented at the end.

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Section: On-chip Image Compression For Cmos Image Sensorsmentioning

confidence: 99%

Section: On-chip Image Compression For Cmos Image Sensorsmentioning

confidence: 99%

Section: Journal Of Sensorsmentioning

confidence: 99%

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CMOS Image Sensor with On-Chip Image Compression: A Review and Performance Analysis

Zhang

Bermak

2010

Journal of Sensors

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“…The circuit is basically a charge-based computational circuit [6]. An elemental block that consists of four different pixels is needed for one-level prediction.…”

Section: Sensor Design Overviewmentioning

confidence: 99%

A CMOS Image Sensor for Focal Plane Decomposition

Lin

Hoffman

Leon-Salas

et al.

2005 IEEE International Symposium on Circuits and Systems

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An alternative image decomposition method that exploits prediction via nearby pixels has been integrated on the CMOS sensor focal plane. The proposed focal plane decomposition is compared to the 2-D discrete wavelet transform (DWT) decomposition commonly used in state of the art compression schemes such as EBCOT and SPIHT. A technique for focal plane prediction is described that can be used to decompose the image into pyramid subbands as is done in the DWT based approaches. Although its simulated compression performance is somewhat lower than that obtained using a wavelet decomposition, the prediction decomposition has much lower computational complexity and is suitable for implementation directly on the focal plane in a completely pixel parallel structure. When coupled with SPIHT-like encoding, the focal plane prediction technique obtains all the advantages of the DWT based SPIHT compression algorithm including both high image quality at low bit rates and optimized data ordering for progressive image transmission. A CMOS test chip to perform a single layer image decomposition based on pixel level parallel computation has been prototyped. The design and test results for this chip are discussed in the paper.

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“…A charge-based circuit for focal plane compression chip was presented in [42]. A charge-based predictor was designed with three neighboring pixels.…”

Section: Charge Sharing Based Wavelet and Spiht Coding Processormentioning

confidence: 99%

On-chip focal-plane compression for CMOS image sensors

Wang¹

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Miniature cameras have become an integral feature of todays' networked multimedia consumer products. The ever increasing demand for low cost ultracompact multimedia products is behind a growing effort towards integrating the different circuit components of a camera system onto a single-chip. Such an integration has become possible using microelectronics industry standard CMOS fabrication process, which enables the fabrication of a CMOS pixel array together with image processing circuitry. This thesis investigates the challenges of integrating the image compression block into a CMOS camera. The direct implementation of standard image compression algorithms like JPEG would result in prohibitively large power and silicon area budgets because image compression standards like JPEG are computationally and resource intensive. v Table of Contents vii List of Figures xi List of Tables xv List of Tables 3.1 Average performance of 20 test images from scientific image database

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Charge-based prediction circuits for focal plane image compression

Cited by 4 publications

References 11 publications

CMOS Image Sensor with On-Chip Image Compression: A Review and Performance Analysis

CMOS Image Sensor with On-Chip Image Compression: A Review and Performance Analysis

A CMOS Image Sensor for Focal Plane Decomposition

On-chip focal-plane compression for CMOS image sensors

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