Energy consumption, indeed, represents one of the essential properties of embedded applications, especially for those devices whose autonomy depends on battery life. The lack of accurate and suitable methodology for energy consumption estimation for embedded applications based on ultra-low power heterogeneous multicore DSP platforms inspired a solution that will be presented in this paper. The solution has been developed as a plugin for the Eclipse based MIDE (Multicore Integrated Development Environment), in order to facilitate production of energy efficient firmware solutions. Evaluation of energy loss has been calculated using instruction-level power analysis, virtual platform, debug information, and diverse input loads. The primary goal was to obtain a precise model of energy consumption that will establish a direct link between program solutions and the amount of energy required for their execution, whilst processing different input loads. Estimation has been validated against empirical data, measured on a real DSP platform. Results show that very high accuracy has been reached.
Energy consumption is becoming one of the most significant aspects of CMOS Integrated Circuits (IC), especially for those applied in embedded devices whose autonomy depends upon battery lifespan. Therefore, an empirical methodology for determination of power and energy dissipation may provide valuable information to IC designers, as well as software developers, which could impact design process and lead to more energy-efficient solutions. This paper presents a novel methodology for determination of static and dynamic components of energy dissipation for those CMOS ICs that do not support turning off clock distribution entirely, but provide ability to divide a clock frequency. For that purpose, we used an Eclipse based IDE that provides a user friendly interface for dividing a clock frequency on ultra-low power embedded DSP platform, which was used as a target device. Measurements were performed using a true RMS multimeter. Various experiments were conducted using different scenarios, on single and multi cores, in order to validate the described empirical methodology, and the outcome confirmed what was expected, that the obtained results are stable and accurate.
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