This paper describes a mixed-signal electrocardiogram (ECG) system for personalized and remote cardiac health monitoring. The novelty of this paper is fourfold. First, a low power analog front end with an efficient automatic gain control mechanism, maintaining the input of the ADC to a level rendering optimum SNR and the enhanced recyclic folded cascode opamp used as an integrator for ADC. Second, a novel on-the-fly PQRST boundary detection (BD) methodology is formulated for finding the boundaries in continuous ECG signal. Third, a novel low-complexity ECG feature extraction architecture is designed by reusing the same module present in the proposed BD methodology. Fourth, the system is having the capability to reconfigure the proposed low power ADC for low (8 b) and high (12 b) resolution with the use of the feedback signal obtained from the digital block when it is in processing. The proposed system has been tested and validated on patient's data from PTBDB, CSEDB, and in-house IIT Hyderabad Data Base (IITHDB) and we have achieved an accuracy of 99% upon testing on various normal and abnormal ECG signals. The whole system is implemented in 180-nm technology resulting in 9.47-µW (at 1 MHz) power consumption and occupying 1.74-mm 2 silicon area.
Genomics has the potential to transform medicine from reactive to a personalized, predictive, preventive and participatory (P4) form. Being a Big Data application with continuously increasing rate of data production, the computational costs of genomics have become a daunting challenge. Most modern computing systems are heterogeneous consisting of various combinations of computing resources, such as CPUs, GPUs and FPGAs. They require platform-specific software and languages to program making their simultaneous operation challenging. Existing read mappers and analysis tools in the whole genome sequencing (WGS) pipeline do not scale for such heterogeneity. Additionally, the computational cost of mapping reads is high due to expensive dynamic programming based verification, where optimized implementations are already available. Thus, improvement in filtration techniques is needed to reduce verification overhead. To address the aforementioned limitations with regards to the mapping element of the WGS pipeline, we propose a Cross-platfOrm Read mApper using opencL (CORAL). CORAL is capable of executing on heterogeneous devices/platforms simultaneously. It can reduce computational time by suitably distributing the workload without any additional programming effort. We showcase this on a quadcore Intel CPU along with two Nvidia GTX 590 GPUs, distributing the workload judiciously to achieve up to 2× speedup compared to when only CPUs are used. To reduce the verification overhead, CORAL dynamically adapts k-mer length during filtration. We demonstrate competitive timings in comparison with other mappers using real and simulated reads. CORAL
A novel scheme to design the hardware for error compensation function which self-compensates the truncation error of fixed width multiplier is presented. The proposed method statistically correlates the compensating carries in the truncated part with the carries generated at the truncation boundary in the non-truncated part. The method also utilises the selective dominant carry compensation for controlling the magnitude of error and hardware complexity. The proposed scheme of error compensation in truncated multiplier is investigated for random inputs, Fast Fourier Transform (FFT) application and Finite impulse response (FIR) application. This proposed scheme shows improvement in the major performance parameters such as mean absolute error, mean-square error, maximum error, standard deviation and variance when compared with previously reported schemes. The scheme noticeably decreases the probability of maximum error to 0.22, 0.11 and 0.2 for input scenarios of random, FFT and FIR applications, respectively, which is minimum in comparison to all existing architectures. The scheme is also investigated for the new proposed figure of merit, i.e. energy error product for the truncated multiplier, to select a balanced error and energy optimised truncated multiplier for specific applications.
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