The latest solution for Global Connectivity is Inter-satellite communication. Inter-satellite communication will able to connect two or more satellites directly and hence efficient data transfer is possible with less delay. Choice of frequency is key concern for inter-satellite communication. In this paper, precisely mentioned about importance of millimeter range frequency band for inter-satellite links (ISL) and more focused on the Tapered Slot antenna (TSA) design at 60 GHz. In the design, Substrate Integrated Waveguide SIW feed and corrugation techniques is used to achieve high gain and narrow beam width. Power Divider is used to design two-element TS antenna of 23 dB. For further outlook of antenna design link analysis is also calculated.
In this paper, the design of hybrid 1-bit full adder circuit using both pass transistor and CMOS logic was implemented. Performance pa-rameters such as power, delay, and PDP were compared with the existing designs such as complementary pass-transistor logic, transmis-sion gate adder. At 0.4V supply at 22nm technology, the average power consumption is 1. 525 uW was found to be extremely low with moderately low delay 90. 25 ps and PDP found to be 0.137 fJ. The present implementation has very good improvement in terms of delay, power and power delay product when compared to the existing hybrid 1-bit full adders. Also the number of transistors has been reduced to 13 where as the existiing hybrid full adder circuit has 16 transistors. The proposed circuit was implemented using mentor graphics tool in 45nm, 32nm and 22nm technologies with different supply voltages.
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