A cascaded bidirectional distributed gain amplifier (BDGA) with asymmetrical stages has been reported. By cascading two unit BDGAs using a common source (CS) stage in the middle, the BDGA benefits the multiplicative gain enhancement while it can still achieve a wide bandwidth owing to the distributed nature of the two BDGAs. Each gain stage of the BDGA is composed of the CS output stage to enhance the linearity in parallel with the cascode input stage to improve noise performance by providing higher gain. The proposed circuit architecture is fabricated in a 65 nm CMOS. The measurements exhibit a gain of 10.5 dB, and the 3‐dB bandwidth from 5.8 to 17.6 GHz. The measured output P1dB is 6.8 dBm along with 9.3 dBm of the saturated output power at 10 GHz. The circuit draws 75 mA from a 1.2 V supply and occupies 1.1 × 0.6 mm2 of the chip area.

We present an X-band bi-directional transmit/receive module (TRM) for a phased array system utilized in radar-based sensor systems. The proposed module, comprising a 6-bit phase shifter, a 6-bit digital step attenuator, and bi-directional gain amplifiers, is fabricated using 65-nm CMOS technology. By constructing passive networks in the phase-shifter and the variable attenuator, the implemented TRM provides amplitude and phase control with 360° phase coverage and 5.625° as the minimum step size while the attenuation range varies from 0 to 31.5 dB with a step size of 0.5 dB. The fabricated T/R module in all of the phase shift states had RMS phase errors of less than 4° and an RMS amplitude error of less than 0.93 dB at 9–11 GHz. The output 1dB gain compression point (OP1dB) of the chip was 5.13 dBm at 10 GHz. The circuit occupies 3.92 × 2.44 mm2 of the chip area and consumes 170 mW of DC power.

No abstract

In this paper, we present a phased-array transceiver chip operating in full X-band (8-12 GHz) in 65-nm CMOS technology. The presented transceiver for the transmit/receive module (TRM) consists of a 6-bit passive phase shifter, a 6-bit attenuator, a bi-directional gain amplifier (BDGA), and a single pole double throw (SPDT) switch connected to the internal power amplifier (PA) and the low-noise amplifier (LNA) to serve as a duplexer. A 64-bit SPI scan-chain is integrated for digital TRM control. The transmitter achieves greater than 15 dB of power gain with 11.84 dBm at the output 1-dB compression point (OP1dB). To achieve a wideband operation of the passive phase shifter, we assigned two different resonant frequencies for the phase leading and lagging networks and aligned the slopes of their phase responses to have the desired phase shifts at the center frequency. The RMS phase error is less than 5 • , and the RMS amplitude error is less than 0.45 dB for all phase and attenuation states within 8-12 GHz while dissipating 216 mW dc power from a 1 V power supply. The receiver shows greater than 15 dB of power gain and has a noise figure (NF) of less than 8.4 dB for the entire X-band. The RMS phase error and the RMS amplitude error are less than 5 • and 0.45 dB, respectively, for all control states within 8-12 GHz. The receiver consumes 110 mW with a 1 V power supply. The transceiver chip occupies an area of 4 × 1.88 mm 2 .

No abstract