We report a hot carrier effect of the thin-film silicon-on-insulator (SOI) power metal oxide semiconductor field-effect transistor (MOSFET) for scaling under a constant drain electric field. The device degradation caused by the hot carrier effect was enhanced by shrinking a channel length even at the constant drain electric field because of the parasitic bipolar effect.
In this paper, we describe the temperature dependence of the hot carrier effect and positive bias temperature instability (PBTI) of a thin-film silicon-on-insulator (SOI) power MOSFET at high temperature. Device degradation, which is caused by the hot carrier effect and PBTI, depends on temperature and it is different under the stress gate bias condition. Device degradation caused by the hot carrier effect occurs at a low stress gate voltage and that caused by PBTI occurs at a high stress gate voltage. The degradation of on-resistance is suppressed as temperature increases at a low stress gate voltage. The threshold voltage shift is maximum when temperature is 473 K at a low stress gate voltage. The degradation of on-resistance and the threshold voltage shift enhance with increasing temperature at a high stress gate voltage.
This paper describes the hot carrier effect of the thin-film SOI power MOSFET with shrinking the design rule. The device degradation caused by hot carrier effect is promoted by shrinking the design rule despite the shrinking under constant drain electric field.
This paper describes the hot carrier effect and positive bias temperature instability (PBTI), of a thin-film SOI power MOSFET at high temperature. The device degradation, which is caused by hot carrier effect and PBTI, depends on temperature. Device degradation is different for stress gate bias condition. Device degradation caused by hot carrier effect occurs at lower stress gate voltage and caused by PBTI occurs at higher stress gate voltage. Degradation of the on-resistance reduces as temperature increases at lower gate stress voltage. Threshold voltage shift shows the maximum when temperature is 473 K at lower stress gate voltage. Degradation of on-resistance enhances and threshold voltage shift increase with increasing temperature at higher stress gate voltage.
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