For the first time, 4Mb split-gate type embedded flash is developed in 45-nm technology with 1M cycling endurance for mass production of various applications. Process integration is designed for logic compatibility, minimizing shift of logic device characteristics so that existing IPs can be used. By process optimization of triplegate flash architecture, high speed operation (write time of 25us and erase operation of less than 2ms) and robust reliability (1M cycle, 150 retention) are achieved.
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