This paper presents design and fabrication of 2way Wilkinson power divider (WPD) for dual operating frequency. This WPD use dual operating frequencies on 2.4GHz and 4.928GHz. In this WPD, two branches of impedance transformer and the output ports are shunted with parallel connection of a resistor (R), an inductor (L) and a capacitor (C).Simulation and measurement results of this WPD design are shown by the graphs of insertion loss (S21 and S3t>, return loss both of input and output (Sl1, S22 and S33) and also isolation between the output ports (S32). Based on the simulation and measurement results, this WPD have a better insertion loss and isolation, and also produce a better return loss of input and output ports for operating on the both frequencies of2.4GHz and 4.928GHz.
A compact radar system becomes a necessity in order to build a lightweight navigation radar. Researches were conducted to create an integrated radar system in the form of one board of 9.3 GHz navigation radar system. Microstrip technology was used for its simple structure and miniaturization at high frequencies. Power divider as a part of the radar system was used to divide the signal from Voltage-Controlled Oscillator (VCO) to Transmitter front end and mixer on the Receiver end. This paper proposed the design and simulation of the Wilkinson Power Divider on Duroid RT5880 substrate using Advanced Design System (ADS) software. The S parameters were analyzed to see the performance of the divider. The proposed design already met the expected requirement of the power divider with more than -30 dB return loss, -3.059 dB insertion loss, and -29.541 dB isolation between divider output ports.
This paper presents 10dB planar directional coupler on FR4 substrate for Automatic Gain Control (AGC) system. The proposed design uses single section coupled line method that simulated using simulation software ADS 2011.10 and fabricated on FR4 substrate. The proposed design exhibits a return loss of -22dB, isolation of -26dB, a coupling level accuracy of 9.4dB and insertion loss of -0.7dB at 600MHz. The proposed design can be applied to translate the maximum Variable Gain Amplifier (VGA) output power level to a value lower than the highest detectable log detector power level in AGC system.
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