Abstract-A system has been developed for measuring the complex permittivity of low loss materials at frequencies from 500 MHz to 7 GHz and over a temperature range up to 1500 • C using stripline resonator cavity method. Details of the design and fabrication of the cavity were discussed. Particular features related to high-temperature operation were described. An improved resonance method at high temperature for determining complex dielectric properties of low-loss materials was developed. The calculation process was given by a physical model of the stripline resonator cavity at high temperature. The paper brought forward the method of segmentation calculation according to the temperature changes over the cavity, which matched the actual situation of high temperature measurements. We have verified the proposed method from measurements of some typical samples with the available reference data in the literature.

The widespread application of artificial neural networks has prompted researchers to experiment with FPGA and customized ASIC designs to speed up their computation. These implementation efforts have generally focused on weight multiplication and signal summation operations, and less on activation functions used in these applications. Yet, efficient hardware implementations of nonlinear activation functions like Exponential Linear Units (ELU), Scaled Exponential Linear Units (SELU), and Hyperbolic Tangent (tanh), are central to designing effective neural network accelerators, since these functions require lots of resources. In this paper, we explore efficient hardware implementations of activation functions using purely combinational circuits, with a focus on two widely used nonlinear activation functions, i.e., SELU and tanh. Our experiments demonstrate that neural networks are generally insensitive to the precision of the activation function. The results also prove that the proposed combinational circuit based approach is very efficient in terms of speed and area, with negligible accuracy loss on the MNIST, CIFAR-10 and IMAGENET benchmarks. Synopsys Design Compiler synthesis results show that circuit designs for tanh and SELU can save between 3.13 7.69 and 4.45 8.45 area compared to the LUT/memory based implementations, and can operate at 5.14GHz and 4.52GHz using the 28nm SVT library, respectively. The implementation is available at: https://github.com/ThomasMrY/ActivationFunctionDemo.

Abstract:In order to identify the optimal structure of an electricity power network under the main assumption of a price dependent demand of electrical energy, we presented an optimization model that aims at analyzing the effect of price-dependent demand on the sustainable electrical supply chain system (SESCS). The system included a power generation system, transmission and distribution substations, and many customers. The electrical energy was generated and transmitted through multiple substations to our customers, and the demand for electricity by the customers is dependent on the price of electricity. In the study, we considered the transmission and the distribution costs which depend on the capacities of power generation, transmission rates and distances between stations. We utilized the inventory theory to develop our model and proposed a procedure to derive an optimal solution for this problem. Finally, numerical examples and sensitivity analysis are provided to illustrate our study and consolidate managerial insights.

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The impact of linear correlation between lognormal distribution grain size mean and sigma along the polysilicon channel on threshold voltage (V th) variability has been investigated in three dimensional (3D) NAND flash. The variety of grain size mean and sigma results in the unstable V th variability. To obtain a stable V th distribution with various grain size mean, the grain size mean dependent V th variability sensitivity to the grain size sigma was used to optimize the linear correlation between grain size mean and sigma via TCAD simulation. The optimized linear correlation with stable V th variability is obtained except for the "unbalance region" affected by the combination of grain boundaries and positions with these grain size mean and sigma values resulting in the slightly shrinking V th variability. Our results strongly suggest that this approach could guide the direction of polysilicon crystallization optimization to obtain stable V th distribution with the predicted linear correlation between grain size mean and sigma.

To analyze the absolute line intensities, as well as the coefficients of air-and selfbroadening of water vapor, 31 transition lines were measured using an externalcavity diode laser (ECDL) in the range of 9090-9750 cm −1 . A multispectrum fitting (MSF) program was used in conjunction with a quadratic speed-dependent Voigt profile (qSDVP) and a Voigt profile (VP) to extract the line intensities and self-and air-broadening coefficients. Values at room temperature (296 K) were then compared with the HITRAN2016 and HITRAN2020 database. The analysis results show that the line intensities and air-broadening coefficients are more consistent with the database while also verifying that the self-broadening coefficients obtained based on qSDVP are larger than those based on VP.

A gate-last process for fabricating HfSiON/TaN n-channel metal-oxide-semiconductor-field-effect transistors (NMOSFETs) is presented. In the process, a HfSiON gate dielectric with an equivalent oxide thickness of 10Å was prepared by a simple physical vapor deposition method. Poly-Si was deposited on the HfSiON gate dielectric as a dummy gate. After the source/drain formation, the poly-Si dummy gate was removed by tetramethylammonium hydroxide (TMAH) wet-etching and replaced by a TaN metal gate. Because the metal gate was formed after the ion-implant doping activation process, the effects of the high temperature process on the metal gate were avoided. The fabricated device exhibits good electrical characteristics, including good driving ability and excellent sub-threshold characteristics. The device's gate length is 73 nm, the driving current is 117 µA/µm under power supply voltages of V GS = V DS = 1.5 V and the off-state current is only 4.4 nA/µm. The lower effective work function of TaN on HfSiON gives the device a suitable threshold voltage (∼ 0.24 V) for high performance NMOSFETs. The device's excellent performance indicates that this novel gate-last process is practical for fabricating high performance MOSFETs.

We fabricate p-channel metal-oxide-semiconductor-field-effect-transistors (PMOSFETs) with a HfSiAlON/MoAlN gate stack using a novel and practical gate-last process. In the process, SiO2/poly-Si is adopted as the dummy gate stack and replaced by an HfSiAlON/MoAlN gate stack after source/drain formation. Because of the high-𝑘/metalgate stack formation after the 1000 ∘ C source/drain ion-implant doping activation, the fabricated PMOSFET has good electrical characteristics. The device's saturation driving current is 2.71×10 −4 A/𝜇m (𝑉GS = 𝑉DS = −1.5 V) and the off-state current is 2.78 × 10 −9 A/𝜇m. The subthreshold slope of 105 mV/dec (𝑉DS = −1.5 V), drain induced barrier lowering of 80 mV/V and 𝑉 th of −0.3 V are obtained. The research indicates that the present PMOSFET could be a solution for high performance PMOSFET applications.