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Dual metal gate transistors with high-k gate dielectrics have been investigated for low-power metal oxide semiconductor (MOS) devices in 45 nm nodes and beyond. Using high-quality HfSiO gate dielectrics, using TiN and Ta for the gate electrode, and minimizing process damage, we have succeeded in markedly improving device performance. Effective work functions of 4.9 eV for TiN and 4.3 eV for Ta on HfSiO were obtained for the first time. Symmetrical threshold voltages of AE0:5 V were realized for these work functions. Small hysteresis and low interface trap densities for both TiN and Ta were obtained, which are almost the same as those of poly-Si/HfSiON transistors. No degradation in electron mobility was achieved for the first time for Ta-NMOS transistors at an effective field of 1.0 MV/cm. The gate leakage current at an equivalent electrical oxide thickness in an inversion of 1.7 nm was suppressed to 1 mA/cm À2 at a gate bias of Vth þ 0:6 V.

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It has been found that the stress of a sputtered Ta film gradually changes toward compression in a normal atmosphere. It was found that the cause of this Ta film stress change is quick oxygen diffusion along grain boundaries. The amount of this stress change was measured to be about ∼3×107 N/m2 when the Ta film was sputtered with Ar gas below 3.5 Pa. The stress change occurred neither in a vacuum nor in a nitrogen atmosphere, but only in an oxygen atmosphere. Once the Ta films had been annealed for 60 min at 100 °C in an oxygen atmosphere, no further stress change was observed.

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