In order to not only obtain a higher frequency radiation but also scan its beam more widely, an active phased array using second harmonic generation is investigated. The active antenna consists of a FET oscillator which plays two roles in fundamental oscillation and frequency multiplying, and the patch antenna resonated at the second harmonic frequency. In the experiments, the radiated beam of the second harmonic wave from the two element active antenna array was scanned more widely than that in the case of the fundamental wave radiation. IL INTRODUCTIONRecently, arrays of microwave and millimeter wave antennas each mounted with an active device have received much attention for spatial power combining to obtain high power solid-state sources and for electronic beam scanning[1]. However, the output powers of solid-state devices decrease with increasing frequency, and there is a limit to the working frequency. One way to generate high power in a higher frequency range than the limit is to utilize second harmonic generation[2][3].The beam scanning of the second harmonic wave using frequency multipliers was proposed[4], but the system was complex because the frequency doubler and an isolator for eliminating mismatch between the oscillator and the doubler was inserted between the oscillator and the antenna.In this paper, we present scanning of the second harmonic wave radiated from a simple active antenna array using FETs.II. ACTIVE ANTENNA Figure 1 shows a serial feedback type oscillator using an FET which plays two roles in fundamental oscillation and frequency multiplying. Maximum second harmonic power can be extracted when the load impedance zr of the oscillator is optimized both at the fundamental frequency and at the second harmonic frequency, The oscillator was fabricated on a Rogers Duroid 5870 substrate with a thickness of 0.508mm and a dielectric constant of £r=2.33. We used MESFET NE76084 as the active devices. Using two coaxial stub tuners for adjustable load of the oscillator, we measured the oscillation characteristics. In the stub tuner adjustment for maximum second harmonic power generation at the drain-source bias voltage VDs = 5.0[V] and the gateGate Bias Line iin Fl Zr Fig. 1: FET oscillator for second harmonic generation. (Dimensions are in millimeter.) source bias voltage VGS = 0.0[V], the variation of the oscillation frequency and the output power with the gate-source bias voltage VGS is shown in Fig.2. The fundarmental frequency was about 5.88GHz and the output power was hardly changed by the gate-source bias voltage. The fundamental output power was about -10dB less than the second harmonic power. In this case, the measured impedance zr of the stub tuner is shown in Fig.3. Thus, when the load of the oscillator is matched at the second harmonic frequency and has pure reactance at the fundamental frequency, the fundamental output power can be suppressed and the maximum second harmonic power can be obtained.A rectangular patch antenna is used in order to radiate the second harmonic output power fr...
A PVT tolerant fully integrated 60 GHz transceiver for IEEE 802.11ad is presented. By introducing a newly proposed self-sensing LDO, the transceiver adjusts bias currents and the LDO output voltage for the PA to minimize the output power variation while relaxing the hot carrier injection (HCI) degradation. The measurement shows excellent robustness against PVT variations, demonstrating only 5 dB output power variation over -20 °C to 85 °C across process corners. IntroductionThe 60 GHz short range wireless system, such as IEEE 802.11ad, has gained significant attention as an enabler for wireless high-definition video links and multi-Gb/s data transfer. While recent works have demonstrated a capability of realizing 60 GHz transceivers in cost effective CMOS technology [1-3], the sustainability of performance over PVT variations remains a difficult challenge. This is especially critical for mobile terminals since the transceiver must be integrated in a miniaturized RF module as illustrated in Fig. 1 under severe thermal constraints.This paper addresses the performance degradation of the transceiver, in particular the output power variation during packet transmission in which periodic calibration is difficult due to short non-transmit intervals. Fabricated in 90 nm CMOS technology, the proposed transceiver achieves excellent robustness against PVT variations while satisfying requirements for the IEEE 802.11ad standard.
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