Silicon transistors are expected to have new gate architectures, channel materials and switching mechanisms in ten years' time. The trend in transistor scaling has already led to a change in gate structure from two dimensions to three, used in fin field-effect transistors, to avoid problems inherent in miniaturization such as high off-state leakage current and the short-channel effect. At present, planar and fin architectures using III-V materials, specifically InGaAs, are being explored as alternative fast channels on silicon because of their high electron mobility and high-quality interface with gate dielectrics. The idea of surrounding-gate transistors, in which the gate is wrapped around a nanowire channel to provide the best possible electrostatic gate control, using InGaAs channels on silicon, however, has been less well investigated because of difficulties in integrating free-standing InGaAs nanostructures on silicon. Here we report the position-controlled growth of vertical InGaAs nanowires on silicon without any buffering technique and demonstrate surrounding-gate transistors using InGaAs nanowires and InGaAs/InP/InAlAs/InGaAs core-multishell nanowires as channels. Surrounding-gate transistors using core-multishell nanowire channels with a six-sided, high-electron-mobility transistor structure greatly enhance the on-state current and transconductance while keeping good gate controllability. These devices provide a route to making vertically oriented transistors for the next generation of field-effect transistors and may be useful as building blocks for wireless networks on silicon platforms.

We report on control of growth directions of InAs nanowires on Si substrate. We achieved to integrate vertical InAs nanowires on Si by modifying initial Si(111) surface in selective-area metal-organic vapor phase epitaxy with flow-rate modulation mode at low temperature. Crosssectional transmission electron microscope and Raman scattering showed that misfit dislocation with local strains were accommodated in the interface.

We report on integration of GaAs nanowire-based light-emitting-diodes (NW-LEDs) on Si substrate by selective-area metalorganic vapor phase epitaxy. The vertically aligned GaAs/AlGaAs core-multishell nanowires with radial p-n junction and NW-LED array were directly fabricated on Si. The threshold current for electroluminescence (EL) was 0.5 mA (current density was approximately 0.4 A/cm(2)), and the EL intensity superlinearly increased with increasing current injections indicating superluminescence behavior. The technology described in this letter could help open new possibilities for monolithic- and on-chip integration of III-V NWs on Si.

Highly uniform GaAs/GaAsP coaxial nanowires were prepared via selective-area metal organic vapor phase epitaxy. Photoluminescence spectra from a single nanowire indicate that the obtained heterostructures can produce near-infrared (NIR) lasing under pulsed light excitation. The end facets of a single nanowire form a natural mirror surface to create an axial cavity, which realizes resonance and give stimulated emission. This study is a considerable advance toward the realization of nanowire-based NIR light sources.

We report on the systematically controlled growth of InP nanowire arrays by catalyst-free selective area metalorganic vapour phase epitaxy on partially masked InP(111)A substrates. The length, diameter, shape and position of the nanowires were precisely controlled by careful choice of the growth conditions and mask patterning. Manipulation of the growth conditions also enabled us to deliberately define the nanowire growth along either the axial or the radial direction, which has significant potential for the realization of novel nanostructures. Transmission electron microscopy studies revealed that the InP nanowires grown were single-crystalline with wurtzite crystal structure and the photoluminescence studies carried out at 4 K on InP nanowire arrays revealed a single intense emission peak with a significant blueshift. The controlled fabrication thus enabled the nanowires to be realized in a highly uniform manner as reproducibly identical structures and with perfect positioning in predetermined configurations, making them highly suitable for practical integration into nanodevices.

We report on the fabrication of GaAs hexagonal nanowires surrounded by ͕110͖ vertical facets on a GaAs ͑111͒ B substrate using selective-area ͑SA͒ metalorganic vapor-phase epitaxial ͑MOVPE͒ growth. The substrate for SA growth was partially covered with thin SiO 2 , and a circular mask opening with a diameter d 0 of 50-200 nm was defined. After SA-MOVPE, GaAs nanowires with a typical diameter d ranging from 50 to 200 nm and a height from 2 to 9 m were formed vertically on the substrate without any catalysts. The size of the nanowire depends on the growth conditions and the opening size of the masked substrate. A possible growth mechanism is also discussed.

We report a strong Kondo effect (Kondo temperature ϳ4 K) at high magnetic field in a selective area growth semiconductor quantum dot. The Kondo effect is ascribed to a singlet-triplet transition in the ground state of the dot. At the transition, the low-temperature conductance approaches the unitary limit. Away from the transition, for low bias voltages and temperatures, the conductance is sharply reduced. The observed behavior is compared to predictions for a two-stage Kondo effect in quantum dots coupled to single-channel leads. DOI: 10.1103/PhysRevLett.88.126803 PACS numbers: 73.23.Hk, 72.15.Qm The observation of the Kondo effect in quantum dots [1 -3] has led to an increased experimental and theoretical interest in this many-body phenomenon. Unlike the conventional case of bulk metals containing magnetic impurities [4], quantum dots [5] offer the possibility to study the Kondo effect at the level of a single artificial magnetic impurity [6], allowing one to tune different parameters. Experiments on quantum dots have also revealed novel Kondo phenomena that have no analog in bulk-metal systems. In particular, multilevel Kondo effects have been studied both theoretically [7][8][9][10][11][12] and experimentally [13][14][15] that differ substantially from the ordinary case of a spin-1͞2 Anderson impurity.In this Letter, we present results on a strong Kondo effect in a lateral quantum dot at high magnetic field. We associate the Kondo effect with a magnetically induced crossing between a spin-singlet and a spin-triplet ground state [9 -14]. In contrast to the results for a vertical semiconductor quantum dot [13] and for a carbon nanotube dot [14], we find a sharp reduction of the conductance at low bias voltage, V SD , and temperature, T. We ascribe the different behavior to the number of channels in the leads which couple to the states in the dot. In lateral dots, tunnel barriers are obtained by successively pinching off the propagating channels. Coulomb blockade develops when the last channel is nearly pinched off. Therefore, only one channel in each lead is coupled to the dot [16]. In vertical dots, however, the tunnel barrier characteristics are determined by the growth parameters, i.e., by the thickness of the different semiconductor materials forming the heterostructure and their relative conduction band offsets. In this case, more than one conducting channel can effectively couple to the dot states. The same is true for carbon nanotubes connected to metal leads. Our results, in combination with previous findings [13,14], show that screening of higher spin states (S $ 1͒ depends strongly on the number of channels coupled to the (artificial) magnetic impurity. Comparison is made to recent theoretical studies on quantum dots in Refs. [16,17], which are partly inspired by the experimental work presented here.Our device (Figs. 1a and 1b) consists of a lateral quantum dot [18] with a nominal diameter ϳ300 nm that is further decreased by application of a negative voltage to the top gate electrode (Fig. 1a)....

We report on a catalyst-free approach for the growth of semiconductor nanowires which is attracting interest as building blocks for nanoscale electronics and circuits. Our approach is based on selective-area MOVPE and nanowires are grown from small circular openings of SiO 2 mask defined on (111)B-oriented substrates. At optimized conditions, extremely uniform array of GaAs and InGaAs nanowires with diameter of about 200 nm was grown on GaAs and InP substrates, respectively. The nanowires have hexagonal cross-section and are perpendicular to the substrates, indicating that they are surrounded by {110} facet sidewalls. By reducing the mask opening size, nanowires with diameter down to 50 nm and length more than 5µm were successfully formed. Photoluminescence and transmission electron microscopy characterization was also carried out. (This article is published in J.