The ·performance gap between processor and memo ry is very serious pro blem in high-performance comput ing because effective performance is limited by memo ry ability. In order to overcome this problem, it is in dispensable to make good use of wide on-chip memo ry bandwidth. For this purpose, arc hitecture and com piler co-optimization is a promising approach beCause most of data access is regular and/or predictable in high performance computing.Thus, we propose a new VLSI architecture called SCI MA as a platform of the co-optimization. SCIMA inte grates software controllable memory (SCM) into a pro cessor chip in addition to ordinary data cache. SCM and cache -can be reconfigured by software during com putation. Hence, memory hierarchy itself is the target of compiler optimization. In this sense, architecture and compiler co-optimization is realized in SCIMA.Towards the co-optimization, we have developed a directive-based compiler and an algorithm of SCM us age to insert directives automatically. In this paper, we present the directives and the outline of the algorithm for automatic optimization.
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