In this paper, a matrix form of the radix-4 Discrete Hartly Transform (DHT) algorithm is derived. And two Process Element (PE) circuits are proposed for the variable-length application. One is for radix-2 with one real multiplier and three adders, and the other is for radix-4 with one real multiplier and seven adders. The radix-4 DHT processor of variable-length, namely, 8192/4096/2048/1024/512, meets the DMT-VDSL and ADSL requirements. Only six real multipliers, 2.01N (16467) registers and simple logic circuits are used to perform 8192-points FFTlIFFT in 231ps. Implemented in 0.25pm 1P5M typical CMOS technology, the core occupies an active area of 5mmx5mm. Power dissipation is 300mW using 2.5V supply voltage.
The tapered phased m a y (TPA) transducer consists of a linear array of piezoelectric elements which possess a linearly tapered thickness. In the transmit mode, the region of excitation along the elevation dimension of a tapered element is centered around that section having a resonance thickness corresponds to the center frequency of the applied pulse. Reciprocally, in the receive mode, the frequency spectrum of the detected echoes can be used to obtain information from the elevation dimension of the object being imaged. Thus, three-dimensional imaging is possible with a TPA. An analysis of an experimental verification and its implications will be discussed.
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