This paper describes an analog/digital CMOS ASIC with the complete data acquisition for use in electrocardiography. It is implemented as a configurable, multi-channel mixed IC for general measurement purpose. All preprocessing components like low noise amplifiers, filters and sample-and-hold circuits are integrated. A 13 bit successive approximation analog/digital converter with 44.1 kS/s is implemented. The chip area is 65 mm2 in a 2 my CMOS technology. The circuit operates at 10 V power supply and consumes only 270 mW
This paper presents the design and implementation of a 12-bit Analog-to-Digital Converter (ADC) for multi-standard TV demodulation applications. The ADC was fabricated in a standard digital 90-nm CMOS process and it is built by means of a front-end sample-and-hold and a cascade of 10 pipeline stages with 1.5-bits resolution. Performance of 60-dB signal-to-noise-ratio and 68-dB spurious-free-dynamic-range is obtained without calibration at 100-MS/s with a 1-V P-P input signal swing. The occupied silicon area is 0.5-mm 2 ; and the power consumption of 94-mW from a 1.2-V supply.
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