The metal gate electrode is used in advanced CMOS semiconductor devices to address new requirements including high conductivity to minimize delays due to interconnections between devices and tunable work function to allow n and p-type devices to operate in surface channel mode with minimal gate depletion effects. The introduction of metal elements to the CMOS gate, such as titanium nitride can impose significant changes to the device fabrication process. This includes process chemistry to pattern metallic structures and to remove metallic-containing residues. In this paper we will report the results of titanium nitride recession in the metal gate stack using a dilute mixture of sulfuric acid, hydrogen peroxide and hydrofluoric acid known by the trade name DSP+. This paper demonstrates that DSP+ can recess the TiN into the gate stack more efficiently than oxidation/etch solutions allowing tuning of the gate length and ensuring complete sidewall encapsulation of the gate.
Platinum (Pt)-incorporation (5 -10%) into nickel silicide films is a promising approach to reduce the contact resistance (RC) at the silicide/Si interface. One key issue during this silicide step is converting Ni-Pt silicide at different rapid thermal annealing (RTA) temperatures. The first RTA is performed to form Ni Silicide at a controllable thickness, followed by a Ni strip to remove access materials, lastly a second RTA is performed to drive Pt into the NiSi network at a higher temperature. This process results in finer crystal grain and enriches the Pt of Ni-Pt silicide, thereby suppressing the increase in resistivity in Ni-Pt silicide. After NiPtSi formation, the final step is to remove the Pt residues with aqua regia (AR). A High Productivity Combinatorial (HPC) materials/process screening technique was used to reduce the number of product wafers needed for the evaluation process development. Using this technique, the etch rates of all materials of interest were tested on blanket wafers. The defectivity was tested using full flow product wafers. Complete NiPt residues removal was achieved using dilute nitric acid and dilute aqua regia at low process temperature. Also, aqua regia shelf-life and queue time before and after RTA were shown to effect the Pt residues removal.
A layer of hardened material (crust) forms on the surface of photo resist (PR) during the implantation. This crust can be described as highly cross-linked polymer [1, 2]. Its thickness and composition depends on the type of PR, implant species, energy, dose, temperature during implantation and other factors. The crust is very resistant against chemical attack. Its chemical resistance tends to increase with the continuous shrink of technology nodes as implant doses increase. Moreover, even small residues of PR, left after cleaning, become more critical with shrinking device geometry. The usual process sequence for stripping a PR after high dose implantation (HDI) is a plasma strip (PS) followed by a wet clean. The drawback of plasma ashing is increased substrate loss and dopant bleach [3]. Plasma strip or plasma ash stand in this paper for the approach of complete PR consumption in the plasma process. Wet stripping alone often is not sufficient for stripping PR after implant doses of ≥ 1x1015 ions/cm2.
scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.