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Low-doped silicon multi-nanowire field effect transistors with high ON/OFF ratio over 10(7) and a low subthreshold swing of 60-120 mV dec(-1) are fabricated using lithographic semiconductor processes. The use of multi-nanowires instead of a single nanowire as sensing elements has shown improved device uniformity and stability in buffer solutions. The device stability is further improved with surface silanization and biasing with a solution gate rather than a backgate. pH sensing with a linear response over a range of 2-9 is achieved using these devices. Selective detection of bovine serum albumin at concentrations as low as 0.1 femtomolar is demonstrated.

Comparative study of the relaxation behavior at very low frequencies of acrylate polymers with pendant 1,3dioxane rings in their structureThe profile shape and the flow behavior of polymer nanoscale gratings made by a thermal nanoimprint process are precisely examined using visible light angular scatterometry. Nanoimprinted poly͑methyl methacrylate͒ ͑PMMA͒ lines with 60-800 nm width, 100-200 nm height, and varied residual thicknesses of 70-400 nm have been investigated using this optical approach, and insightful observations are made regarding residual stress buildup during thermal nanoimprint. In addition, a nonlinear profile model has been developed for scatterometry to monitor the "melting" behavior of PMMA gratings under annealing around its glass transition temperature. The polymer nanostructures were found to relax primarily at high stress regions.

Epitaxy growth loading effect-the growth rate difference between device macros due to their local open ratio difference-is an important consideration for device design and thus process optimization. A poor loading process leads to device performance delta across macros. For eSiGe on FinFETs, we found that optimized eSiGe on FinFETs saturates as the eSiGe diamond pins at fin top surface and the fin-sidewall-spacer (FSS). The eSiGe diamond size measured by lateral CD does not increase with deposition time, but it linearly correlates to cavity depth and FSS pushdown. In principle, the eSiGe loading effect can be addressed with an extended growth time until every device macros saturates. However, it is found that, the epitaxy growth related defects, measured by abnormal eSiGe and unwanted growth, can also be elevated to an unacceptable level for a longer deposition time. Thus, the eSiGe loading process still needs to be optimized for an improved process window. In this work, an optimized eSiGe process achieves reduced loading between 2-fin and 40-fin macros and thus a smaller pFET performance gap between the two device macros.

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