Amorphous oxide semiconductors have been applied to thin-film electronics on the backplanes of organic light-emitting diode (OLED) displays. In mobile and high-refresh-rate display applications, demands have been increasing for both low power consumption and high operation speed of the electronics. Here, based on ab initio calculations, we suggest that density engineering of amorphous InGaZnO 4 semiconductors can improve electrical properties. The density of an amorphous material is typically variable over a wide range through process control as well as device design and mechanical operation. It is shown here that increasing the density (up to 6.4 g/cm 3 ) of amorphous InGaZnO 4 semiconductors with respect to the conventional density (5.8 g/cm 3 ) widens the electronic energy gap by +3.8% and reduces the effective mass of electrons by −4.3%, simultaneously. In a wide range of 3.6−7.8 g/cm 3 , the electrical properties are found to vary nonmonotonically, of which the physical mechanisms combined with the microstructures are investigated in depth. Density optimization can ultimately lead to both a reduction of off-state current and an enhancement of electron mobility in amorphous InGaZnO 4 -based thin-film transistors.
Two-dimensional (2D)-layered material tantalum disulfide (2H-TaS 2 ) is known to be a van der Waals conductor at room temperature. Here, 2D-layered TaS 2 has been partially oxidized by utraviolet-ozone (UV-O 3 ) annealing to form a 12nm-thin TaO X on conducting TaS 2 , so that the TaO X /2H-TaS 2 structure might be self-assembled. Utilizing the TaO X /2H-TaS 2 structure as a platform, each device of a β-Ga 2 O 3 channel MOSFET and a TaO X memristor has been successfully fabricated. An insulator structure of Pt/TaO X /2H-TaS 2 shows good a dielectric constant (k ∼ 21) and strength (∼3 MV/cm) of achieved TaO X , which is enough to support a β-Ga 2 O 3 transistor channel. Based on the quality of TaO X and low trap density of the TaO X /β-Ga 2 O 3 interface, which is achieved via another UV-O 3 annealing, excellent device properties such as little hysteresis (<∼0.04 V), band-like transport, and a steep subthreshold swing of ∼85 mV/dec are achieved. With a Cu electrode on top of the TaO X /2H-TaS 2 structure, the TaO X acts as a memristor operating around ∼2 V for nonvolatile bipolar and unipolar mode memories. The functionalities of the TaO X /2H-TaS 2 platform become more distinguished finally when the Cu/TaO X /2H-TaS 2 memristor and β-Ga 2 O 3 MOSFET are integrated to form a resistive memory switching circuit. The circuit nicely demonstrates the multilevel memory functions. KEYWORDS: β-Ga 2 O 3 , vdW, platform, memristor, transistor
While SnSe has been known as a high figure of merit (ZT) thermoelectric material at high temperatures, it has a low ZT at room temperature. SnSe has the β (Cmcm) phase at high temperature but the α (Pnma) phase at room temperature. In the present work, we first investigate the phase-transition temperature T c between the α and β phases of SnSe based on density functional theory calculations and obtain 740 K, which is close to the experimental value of about 800 K. We then consider Ca alloying in SnSe and calculate T c between the α and β phases of Ca x Sn 1−x Se. It is found that the Ca alloying lowers T c down to 220 K as the Ca content x increases up to x = 0.1875. For x > 0.14, Ca x Sn 1−x Se is obtained to have the β phase at room temperature, allowing it to be suggested as a room-temperature high figure of merit thermoelectric material.
scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.