ObjectiveThe aim of this study was to compare the risk factors associated with mild/moderate meconium aspiration syndrome (MAS) with those associated with severe in meconium-stained term neonates.MethodsConsecutive singleton term neonates (n=671) with meconium staining at birth from all deliveries (n=14,666) in our institution from January 2006 to December 2012 were included. Both maternal and neonatal variables were examined. Among the study population, for women who underwent the trial of labor (n=644), variables associated with labor were also examined. These variables were compared between the mild/moderate MAS group, the severe MAS group, and the MAS-absent group.ResultsMAS developed in 10.6% (71/671) of neonates with meconium staining at birth. Among the neonates with MAS, 81.7% had mild MAS, 5.6% had moderate MAS, and 12.7% had severe MAS. The presence of minimal variability was significantly increased in both the mild/moderate and the severe MAS groups. The frequencies of nulliparity, fetal tachycardia, and intrapartum fever were significantly increased in the mild/moderate MAS group, but not in the severe MAS group. While a longer duration of the second stage of labor was significantly associated with mild/moderate MAS, severe MAS was associated with a shorter duration of the second stage. Notably, low mean cord pH (7.165 [6.850-7.375]) was significantly associated with mild/moderate MAS, but not with severe MAS (7.220 [7.021-7.407]) compared with the absence of MAS (7.268 [7.265-7.271]).ConclusionOur data suggest the development of severe MAS is not simply a linear extension of the same risk factors driving mild/moderate MAS.
We have demonstrated, for the first time, a novel three-dimensional (3D) memory chip architecture of stacked-memory-devices-on-logic (SMOL) achieving up to 95% of cell-area efficiency by directly building up memory devices on top of front-end CMOS devices. In order to realize the SMOL, a unique 3D Flash memory device and vertical integration structure have been successfully developed. The SMOL architecture has great potential to achieve tera-bit level memory density by stacking memory devices vertically and maximizing cell-area efficiency. Furthermore, various emerging devices could replace the 3D memory device to develop new 3D chip architectures.
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